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-rw-r--r--src/mainboard/google/rambi/devicetree.cb10
-rw-r--r--src/soc/intel/baytrail/southcluster.c2
2 files changed, 10 insertions, 2 deletions
diff --git a/src/mainboard/google/rambi/devicetree.cb b/src/mainboard/google/rambi/devicetree.cb
index e7f86ce321..66d98edf24 100644
--- a/src/mainboard/google/rambi/devicetree.cb
+++ b/src/mainboard/google/rambi/devicetree.cb
@@ -38,7 +38,15 @@ chip soc/intel/baytrail
device pci 1e.3 off end # HSUART1
device pci 1e.4 on end # HSUART2
device pci 1e.5 on end # SPI
- device pci 1f.0 on end # LPC Bridge
+ device pci 1f.0 on
+ chip ec/google/chromeec
+ # We only have one init function that
+ # we need to call to initialize the
+ # keyboard part of the EC.
+ device pnp ff.1 on # dummy address
+ end
+ end
+ end # LPC Bridge
device pci 1f.3 off end # SMBus
end
end
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index b58f0e084f..eacabf3098 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -385,7 +385,7 @@ static struct device_operations device_ops = {
.enable_resources = NULL,
.init = NULL,
.enable = southcluster_enable_dev,
- .scan_bus = NULL,
+ .scan_bus = scan_static_bus,
.ops_pci = &soc_pci_ops,
};