diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/via/pc2500e/Options.lb | 4 | ||||
| -rw-r--r-- | src/mainboard/via/pc2500e/mptable.c | 159 |
2 files changed, 162 insertions, 1 deletions
diff --git a/src/mainboard/via/pc2500e/Options.lb b/src/mainboard/via/pc2500e/Options.lb index fa2b02b2bb..d023c36757 100644 --- a/src/mainboard/via/pc2500e/Options.lb +++ b/src/mainboard/via/pc2500e/Options.lb @@ -18,6 +18,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +uses CONFIG_SMP uses HAVE_MP_TABLE uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE @@ -80,7 +81,8 @@ default CONFIG_PCI_ROM_RUN = 0 default CONFIG_CONSOLE_VGA = 0 default CONFIG_CHIP_NAME = 1 default HAVE_FALLBACK_BOOT = 1 -default HAVE_MP_TABLE = 0 +default CONFIG_SMP = 1 +default HAVE_MP_TABLE = 1 default CONFIG_UDELAY_TSC = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default HAVE_HARD_RESET = 0 diff --git a/src/mainboard/via/pc2500e/mptable.c b/src/mainboard/via/pc2500e/mptable.c new file mode 100644 index 0000000000..7f0ae85806 --- /dev/null +++ b/src/mainboard/via/pc2500e/mptable.c @@ -0,0 +1,159 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * (Written by Yinghai Lu <yinghailu@amd.com> for AMD) + * Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de> + * (Thanks to LSRA University of Mannheim for their support) + * Copyright (C) 2008 Jonathan A. Kollasch <jakllsch@kollasch.net> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <console/console.h> +#include <arch/smp/mpspec.h> +#include <device/pci.h> +#include <string.h> +#include <stdint.h> +#include <../../../southbridge/via/vt8237r/vt8237r.h> + + +#define bus_isa 2 + +void *smp_write_config_table(void *v) +{ + static const char sig[4] = "PCMP"; + static const char oem[8] = "VIA "; + static const char productid[12] = "PC2500 "; + struct mp_config_table *mc; + + int bus_num; + int i; + + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + memset(mc, 0, sizeof(*mc)); + + memcpy(mc->mpc_signature, sig, sizeof(sig)); + mc->mpc_length = sizeof(*mc); /* initially just the header */ + mc->mpc_spec = 0x04; + mc->mpc_checksum = 0; /* not yet computed */ + memcpy(mc->mpc_oem, oem, sizeof(oem)); + memcpy(mc->mpc_productid, productid, sizeof(productid)); + mc->mpc_oemptr = 0; + mc->mpc_oemsize = 0; + mc->mpc_entry_count = 0; /* No entries yet... */ + mc->mpc_lapic = LAPIC_ADDR; + mc->mpe_length = 0; + mc->mpe_checksum = 0; + mc->reserved = 0; + + smp_write_processors(mc); + + +/* Bus: Bus ID Type*/ + /* define numbers for pci and isa bus */ + for (bus_num = 0; bus_num < bus_isa; bus_num++) { + smp_write_bus(mc, bus_num, "PCI "); + } + smp_write_bus(mc, bus_isa, "ISA "); + + +/* I/O APICs: APIC ID Version State Address*/ + smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, VT8237R_APIC_BASE); + + /* Now, assemble the table. */ + + smp_write_intsrc(mc, mp_ExtINT, + MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, + bus_isa, 0x0, VT8237R_APIC_ID, 0x0); + +#define ISA_INT(intr, pin) \ + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, \ + bus_isa, (intr), VT8237R_APIC_ID, (pin)) + + ISA_INT(1, 1); + ISA_INT(0, 2); + ISA_INT(3, 3); + ISA_INT(4, 4); + + ISA_INT(6, 6); + ISA_INT(7, 7); + ISA_INT(8, 8); + ISA_INT(9, 9); + + ISA_INT(0xc, 0xc); + ISA_INT(0xd, 0xd); + ISA_INT(0xe, 0xe); + ISA_INT(0xf, 0xf); + +#define PCI_INT(bus, dev, fn, pin) \ + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, \ + bus, (((dev)<<2)|(fn)), VT8237R_APIC_ID, (pin)) + + // PCI slot 1 + PCI_INT(0, 8, 0, 16); + PCI_INT(0, 8, 1, 17); + PCI_INT(0, 8, 2, 18); + PCI_INT(0, 8, 3, 19); + + // PCI slot 2 + PCI_INT(0, 9, 0, 17); + PCI_INT(0, 9, 1, 18); + PCI_INT(0, 9, 2, 19); + PCI_INT(0, 9, 3, 16); + + // SATA + PCI_INT(0, 15, 1, 20); + + // USB + PCI_INT(0, 16, 0, 21); + PCI_INT(0, 16, 1, 21); + PCI_INT(0, 16, 2, 21); + PCI_INT(0, 16, 3, 21); + + // Audio + PCI_INT(0, 17, 2, 22); + + // Ethernet + PCI_INT(0, 18, 0, 23); + + /* Onboard VGA */ + PCI_INT(1, 0, 0, 16); + +/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ + smp_write_lintsrc(mc, mp_ExtINT, + MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, + 0, 0x0, MP_APIC_ALL, 0x0); + smp_write_lintsrc(mc, mp_NMI, + MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, + 0, 0x0, MP_APIC_ALL, 0x1); + + /* There is no extension information... */ + + /* Compute the checksums */ + mc->mpe_checksum = + smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); + mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length); + printk_debug("Wrote the mp table end at: %p - %p\n", + mc, smp_next_mpe_entry(mc)); + return smp_next_mpe_entry(mc); +} + +unsigned long write_smp_table(unsigned long addr) +{ + void *v; + v = smp_write_floating_table(addr); + return (unsigned long)smp_write_config_table(v); +} |