4 files changed, 45 insertions, 2 deletions
diff --git a/src/mainboard/google/fizz/Kconfig b/src/mainboard/google/fizz/Kconfig
index e15d229f6e..107af9ad38 100644
--- a/src/mainboard/google/fizz/Kconfig
+++ b/src/mainboard/google/fizz/Kconfig
@@ -83,4 +83,8 @@ config TPM_TIS_ACPI_INTERRUPT
 	int
 	default 64  # GPE0_DW2_00 (GPP_E0)
 
+config INCLUDE_NHLT_BLOBS
+	bool "Include blobs for audio."
+	select NHLT_RT5663
+
 endif
diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb
index f1d2b7731a..a493de5535 100644
--- a/src/mainboard/google/fizz/devicetree.cb
+++ b/src/mainboard/google/fizz/devicetree.cb
@@ -245,6 +245,13 @@ chip soc/intel/skylake
 		device pci 17.0 on end # SATA
 		device pci 19.0 on  end # UART #2
 		device pci 19.1 on
+			chip drivers/i2c/generic
+				register "hid" = ""10EC5663""
+				register "name" = ""RT53""
+				register "desc" = ""Realtek RT5663""
+				register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D9)"
+				device i2c 13 on end
+			end
 		end # I2C #5
 		device pci 19.2 off  end # I2C #4
 		device pci 1c.0 on end # PCI Express Port 1
diff --git a/src/mainboard/google/fizz/gpio.h b/src/mainboard/google/fizz/gpio.h
index 56324b54b0..13081ec673 100644
--- a/src/mainboard/google/fizz/gpio.h
+++ b/src/mainboard/google/fizz/gpio.h
@@ -143,8 +143,8 @@ static const struct pad_config gpio_table[] = {
 /* ISH_I2C0_SCL */	PAD_CFG_NC(GPP_D6),
 /* ISH_I2C1_SDA */	PAD_CFG_NC(GPP_D7),
 /* ISH_I2C1_SCL */	PAD_CFG_NC(GPP_D8),
-/* ISH_SPI_CS# */	PAD_CFG_GPI_APIC(GPP_D9, NONE,
-					PLTRST), /* HP_IRQ_GPIO */
+/* ISH_SPI_CS# */	PAD_CFG_GPI_INT(GPP_D9, NONE,
+					PLTRST, EDGE), /* HP_IRQ_GPIO */
 /* ISH_SPI_CLK */	PAD_CFG_NC(GPP_D10),
 /* ISH_SPI_MISO */	PAD_CFG_NC(GPP_D11),
 /* ISH_SPI_MOSI */	PAD_CFG_NC(GPP_D12),
diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c
index 1f6dc87c65..a925f084c7 100644
--- a/src/mainboard/google/fizz/mainboard.c
+++ b/src/mainboard/google/fizz/mainboard.c
@@ -18,13 +18,43 @@
 #include <device/device.h>
 #include <ec/ec.h>
 #include <soc/pci_devs.h>
+#include <soc/nhlt.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
+static const char *oem_id = "GOOGLE";
+static const char *oem_table_id = "FIZZ";
+
 static void mainboard_init(device_t dev)
 {
 	mainboard_ec_init();
 }
 
+static unsigned long mainboard_write_acpi_tables(
+	device_t device, unsigned long current, acpi_rsdp_t *rsdp)
+{
+	uintptr_t start_addr;
+	uintptr_t end_addr;
+	struct nhlt *nhlt;
+
+	start_addr = current;
+
+	nhlt = nhlt_init();
+	if (!nhlt)
+		return start_addr;
+
+	/* RT5663 Headset codec */
+	if (nhlt_soc_add_rt5663(nhlt, AUDIO_LINK_SSP1))
+		printk(BIOS_ERR, "Couldn't add headset codec.\n");
+
+	end_addr = nhlt_soc_serialize_oem_overrides(nhlt, start_addr,
+				oem_id, oem_table_id, 0);
+
+	if (end_addr != start_addr)
+		acpi_add_table(rsdp, (void *)start_addr);
+
+	return end_addr;
+}
+
 static void mainboard_enable(device_t dev)
 {
 	device_t tpm;
@@ -44,6 +74,8 @@ static void mainboard_enable(device_t dev)
 		if (tpm)
 			tpm->enabled = 0;
 	}
+
+	dev->ops->write_acpi_tables = mainboard_write_acpi_tables;
 }
 
 struct chip_operations mainboard_ops = {