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-rw-r--r--src/mainboard/google/reef/variants/baseboard/devicetree.cb14
1 files changed, 12 insertions, 2 deletions
diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
index 30d61f63d4..559b0071be 100644
--- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
@@ -71,8 +71,18 @@ chip soc/intel/apollolake
register "gpe0_dw2" = "PMC_GPE_N_63_32"
register "gpe0_dw3" = "PMC_GPE_SW_31_0"
- # Enable I2C2 bus early for TPM access
- register "i2c[2].early_init" = "1"
+ # Enable I2C2 bus early for TPM access and configure as 400kHz
+ # with manually tuned values.
+ register "i2c[2]" = "{
+ .early_init = 1,
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 0xd0,
+ .scl_hcnt = 0x68,
+ .sda_hold = 0x27,
+ }
+ }"
# Minimum SLP S3 assertion width 28ms.
register "slp_s3_assertion_width_usecs" = "28000"