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-rw-r--r--src/soc/intel/baytrail/ramstage.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/ramstage.c b/src/soc/intel/baytrail/ramstage.c
index 10c030fcb3..229e3679df 100644
--- a/src/soc/intel/baytrail/ramstage.c
+++ b/src/soc/intel/baytrail/ramstage.c
@@ -20,6 +20,7 @@
#include <arch/cpu.h>
#include <console/console.h>
#include <cpu/intel/microcode.h>
+#include <cpu/x86/cr.h>
#include <cpu/x86/msr.h>
#include <device/device.h>
#include <device/pci_def.h>
@@ -109,6 +110,9 @@ void baytrail_init_pre_device(void)
fill_in_pattrs();
+ /* Allow for SSE instructions to be executed. */
+ write_cr4(read_cr4() | CR4_OSFXSR | CR4_OSXMMEXCPT);
+
/* Get GPIO initial states from mainboard */
config = mainboard_get_gpios();
setup_soc_gpios(config);