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-rw-r--r--src/arch/x86/bootblock_crt0.S3
-rw-r--r--src/cpu/x86/32bit/entry32.inc1
-rw-r--r--src/cpu/x86/Makefile.inc2
-rw-r--r--src/cpu/x86/entry16.S (renamed from src/cpu/x86/16bit/entry16.inc)8
4 files changed, 10 insertions, 4 deletions
diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S
index 387920e38a..3e9065b707 100644
--- a/src/arch/x86/bootblock_crt0.S
+++ b/src/arch/x86/bootblock_crt0.S
@@ -10,13 +10,12 @@
#include <cpu/x86/cr.h>
-.section .init._start, "ax", @progbits
+.section .init, "ax", @progbits
/*
* Include the old code for reset vector and protected mode entry. That code has
* withstood the test of time.
*/
-#include <cpu/x86/16bit/entry16.inc>
#include <cpu/x86/16bit/reset16.inc>
#include <cpu/x86/32bit/entry32.inc>
diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc
index 873a809616..b28fa2f37e 100644
--- a/src/cpu/x86/32bit/entry32.inc
+++ b/src/cpu/x86/32bit/entry32.inc
@@ -13,6 +13,7 @@
*/
.align 4
+.globl __protected_start
__protected_start:
/* Save the BIST value */
movl %eax, %ebp
diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc
index cd73b72fe3..393506b8e3 100644
--- a/src/cpu/x86/Makefile.inc
+++ b/src/cpu/x86/Makefile.inc
@@ -8,6 +8,8 @@ ramstage-y += backup_default_smm.c
subdirs-$(CONFIG_CPU_INTEL_COMMON_SMM) += ../intel/smm
+bootblock-y += entry16.S
+
additional-dirs += $(obj)/cpu/x86
SIPI_ELF=$(obj)/cpu/x86/sipi_vector.elf
diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/entry16.S
index 5e90da1413..1ecd6ed422 100644
--- a/src/cpu/x86/16bit/entry16.inc
+++ b/src/cpu/x86/entry16.S
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
/*
* This software and ancillary information (herein called SOFTWARE)
* called LinuxBIOS is made available under the terms described here.
@@ -28,8 +30,10 @@
#include <arch/rom_segs.h>
#include <cpu/x86/post_code.h>
-/* Symbol _start16bit must be aligned to 4kB to start AP CPUs with
- * Startup IPI message without RAM.
+.section .init._start, "ax", @progbits
+
+/* Symbol _start16bit must reachable from the reset vector, and be aligned to
+ * 4kB to start AP CPUs with Startup IPI message without RAM.
*/
.align 4096
.code16