diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/nyan/pmic.c | 71 | ||||
-rw-r--r-- | src/mainboard/google/nyan_big/pmic.c | 66 |
2 files changed, 74 insertions, 63 deletions
diff --git a/src/mainboard/google/nyan/pmic.c b/src/mainboard/google/nyan/pmic.c index e63d9f7e24..cea872602a 100644 --- a/src/mainboard/google/nyan/pmic.c +++ b/src/mainboard/google/nyan/pmic.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright 2013 Google Inc. + * Copyright 2014 Google Inc. * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify @@ -33,42 +33,44 @@ enum { struct as3722_init_reg { u8 reg; u8 val; + u8 delay; }; static struct as3722_init_reg init_list[] = { - {AS3722_SDO0, 0x3C}, - {AS3722_SDO1, 0x32}, - {AS3722_SDO2, 0x3C}, - {AS3722_SDO3, 0x00}, - {AS3722_SDO4, 0x00}, - {AS3722_SDO5, 0x50}, - {AS3722_SDO6, 0x28}, - {AS3722_LDO0, 0x8A}, - {AS3722_LDO1, 0x00}, - {AS3722_LDO2, 0x10}, - {AS3722_LDO3, 0x59}, - {AS3722_LDO4, 0x00}, - {AS3722_LDO5, 0x00}, - {AS3722_LDO6, 0x3F}, - {AS3722_LDO7, 0x00}, - {AS3722_LDO9, 0x00}, - {AS3722_LDO10, 0x00}, - {AS3722_LDO11, 0x00}, + {AS3722_SDO0, 0x3C, 1}, + {AS3722_SDO1, 0x32, 0}, + {AS3722_LDO3, 0x59, 0}, + {AS3722_SDO2, 0x3C, 0}, + {AS3722_SDO3, 0x00, 0}, + {AS3722_SDO4, 0x00, 0}, + {AS3722_SDO5, 0x50, 0}, + {AS3722_SDO6, 0x28, 1}, + {AS3722_LDO0, 0x8A, 0}, + {AS3722_LDO1, 0x00, 0}, + {AS3722_LDO2, 0x10, 0}, + {AS3722_LDO4, 0x00, 0}, + {AS3722_LDO5, 0x00, 0}, + {AS3722_LDO6, 0x3F, 0}, + {AS3722_LDO7, 0x00, 0}, + {AS3722_LDO9, 0x00, 0}, + {AS3722_LDO10, 0x00, 0}, + {AS3722_LDO11, 0x00, 1}, }; -#define AS3722_INIT_REG_LEN ARRAY_SIZE(init_list) -static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val) +static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay) { i2c_write(bus, AS3722_I2C_ADDR, reg, 1, &val, 1); - udelay(10 * 1000); + if (do_delay) + udelay(500); } static void pmic_slam_defaults(unsigned bus) { int i; - - for (i = 0; i < AS3722_INIT_REG_LEN; i++) - pmic_write_reg(bus, init_list[i].reg, init_list[i].val); + for (i = 0; i < ARRAY_SIZE(init_list); i++) { + struct as3722_init_reg *reg = &init_list[i]; + pmic_write_reg(bus, reg->reg, reg->val, reg->delay); + } } void pmic_init(unsigned bus) @@ -84,15 +86,18 @@ void pmic_init(unsigned bus) /* First set VDD_CPU to 1.2V, then enable the VDD_CPU regulator. */ if (board_id() == 0) - pmic_write_reg(bus, 0x00, 0x3c); + pmic_write_reg(bus, 0x00, 0x3c, 1); else - pmic_write_reg(bus, 0x00, 0x50); + pmic_write_reg(bus, 0x00, 0x50, 1); /* First set VDD_GPU to 1.0V, then enable the VDD_GPU regulator. */ - pmic_write_reg(bus, 0x06, 0x28); + pmic_write_reg(bus, 0x06, 0x28, 1); - /* First set VPP_FUSE to 1.2V, then enable the VPP_FUSE regulator. */ - pmic_write_reg(bus, 0x12, 0x10); + /* + * First set +1.2V_GEN_AVDD to 1.2V, then enable the +1.2V_GEN_AVDD + * regulator. + */ + pmic_write_reg(bus, 0x12, 0x10, 1); /* * Bring up VDD_SDMMC via the AS3722 PMIC on the PWR I2C bus. @@ -101,12 +106,12 @@ void pmic_init(unsigned bus) * NOTE: We do this early because doing it later seems to hose the CPU * power rail/partition startup. Need to debug. */ - pmic_write_reg(bus, 0x16, 0x3f); + pmic_write_reg(bus, 0x16, 0x3f, 1); /* * Panel power GPIO O4. Set mode for GPIO4 (0x0c to 7), then set * the value (register 0x20 bit 4) */ - pmic_write_reg(bus, 0x0c, 0x07); - pmic_write_reg(bus, 0x20, 0x10); + pmic_write_reg(bus, 0x0c, 0x07, 0); + pmic_write_reg(bus, 0x20, 0x10, 1); } diff --git a/src/mainboard/google/nyan_big/pmic.c b/src/mainboard/google/nyan_big/pmic.c index 89e1f873c5..a6f6912a62 100644 --- a/src/mainboard/google/nyan_big/pmic.c +++ b/src/mainboard/google/nyan_big/pmic.c @@ -33,42 +33,45 @@ enum { struct as3722_init_reg { u8 reg; u8 val; + u8 delay; }; static struct as3722_init_reg init_list[] = { - {AS3722_SDO0, 0x3C}, - {AS3722_SDO1, 0x32}, - {AS3722_SDO2, 0x3C}, - {AS3722_SDO3, 0x00}, - {AS3722_SDO4, 0x00}, - {AS3722_SDO5, 0x50}, - {AS3722_SDO6, 0x28}, - {AS3722_LDO0, 0x8A}, - {AS3722_LDO1, 0x00}, - {AS3722_LDO2, 0x10}, - {AS3722_LDO3, 0x59}, - {AS3722_LDO4, 0x00}, - {AS3722_LDO5, 0x00}, - {AS3722_LDO6, 0x3F}, - {AS3722_LDO7, 0x00}, - {AS3722_LDO9, 0x00}, - {AS3722_LDO10, 0x00}, - {AS3722_LDO11, 0x00}, + {AS3722_SDO0, 0x3C, 1}, + {AS3722_SDO1, 0x32, 0}, + {AS3722_LDO3, 0x59, 0}, + {AS3722_SDO2, 0x3C, 0}, + {AS3722_SDO3, 0x00, 0}, + {AS3722_SDO4, 0x00, 0}, + {AS3722_SDO5, 0x50, 0}, + {AS3722_SDO6, 0x28, 1}, + {AS3722_LDO0, 0x8A, 0}, + {AS3722_LDO1, 0x00, 0}, + {AS3722_LDO2, 0x10, 0}, + {AS3722_LDO4, 0x00, 0}, + {AS3722_LDO5, 0x00, 0}, + {AS3722_LDO6, 0x3F, 0}, + {AS3722_LDO7, 0x00, 0}, + {AS3722_LDO9, 0x00, 0}, + {AS3722_LDO10, 0x00, 0}, + {AS3722_LDO11, 0x00, 1}, }; -#define AS3722_INIT_REG_LEN ARRAY_SIZE(init_list) -static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val) +static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay) { i2c_write(bus, AS3722_I2C_ADDR, reg, 1, &val, 1); - udelay(10 * 1000); + if (do_delay) + udelay(500); } static void pmic_slam_defaults(unsigned bus) { int i; - for (i = 0; i < AS3722_INIT_REG_LEN; i++) - pmic_write_reg(bus, init_list[i].reg, init_list[i].val); + for (i = 0; i < ARRAY_SIZE(init_list); i++) { + struct as3722_init_reg *reg = &init_list[i]; + pmic_write_reg(bus, reg->reg, reg->val, reg->delay); + } } void pmic_init(unsigned bus) @@ -83,13 +86,16 @@ void pmic_init(unsigned bus) pmic_slam_defaults(bus); /* First set VDD_CPU to 1.2V, then enable the VDD_CPU regulator. */ - pmic_write_reg(bus, 0x00, 0x50); + pmic_write_reg(bus, 0x00, 0x50, 1); /* First set VDD_GPU to 1.0V, then enable the VDD_GPU regulator. */ - pmic_write_reg(bus, 0x06, 0x28); + pmic_write_reg(bus, 0x06, 0x28, 1); - /* First set VPP_FUSE to 1.2V, then enable the VPP_FUSE regulator. */ - pmic_write_reg(bus, 0x12, 0x10); + /* + * First set +1.2V_GEN_AVDD to 1.2V, then enable the +1.2V_GEN_AVDD + * regulator. + */ + pmic_write_reg(bus, 0x12, 0x10, 1); /* * Bring up VDD_SDMMC via the AS3722 PMIC on the PWR I2C bus. @@ -98,12 +104,12 @@ void pmic_init(unsigned bus) * NOTE: We do this early because doing it later seems to hose the CPU * power rail/partition startup. Need to debug. */ - pmic_write_reg(bus, 0x16, 0x3f); + pmic_write_reg(bus, 0x16, 0x3f, 1); /* * Panel power GPIO O4. Set mode for GPIO4 (0x0c to 7), then set * the value (register 0x20 bit 4) */ - pmic_write_reg(bus, 0x0c, 0x07); - pmic_write_reg(bus, 0x20, 0x10); + pmic_write_reg(bus, 0x0c, 0x07, 0); + pmic_write_reg(bus, 0x20, 0x10, 1); } |