5 files changed, 4 insertions, 15 deletions
diff --git a/src/mainboard/asus/kcma-d8/mainboard.c b/src/mainboard/asus/kcma-d8/mainboard.c
index f8b2bd712f..8da41b085b 100644
--- a/src/mainboard/asus/kcma-d8/mainboard.c
+++ b/src/mainboard/asus/kcma-d8/mainboard.c
@@ -24,10 +24,6 @@
 #include <southbridge/amd/sb700/sb700.h>
 #include <southbridge/amd/sr5650/cmn.h>
 
-
-void set_pcie_reset(void);
-void set_pcie_dereset(void);
-
 void set_pcie_reset(void)
 {
 	struct device *pcie_core_dev;
diff --git a/src/mainboard/asus/kgpe-d16/mainboard.c b/src/mainboard/asus/kgpe-d16/mainboard.c
index ac28f6e40a..14a4a69762 100644
--- a/src/mainboard/asus/kgpe-d16/mainboard.c
+++ b/src/mainboard/asus/kgpe-d16/mainboard.c
@@ -24,10 +24,6 @@
 #include <southbridge/amd/sb700/sb700.h>
 #include <southbridge/amd/sr5650/cmn.h>
 
-
-void set_pcie_reset(void);
-void set_pcie_dereset(void);
-
 void set_pcie_reset(void)
 {
 	struct device *pcie_core_dev;
diff --git a/src/mainboard/supermicro/h8scm_fam10/mainboard.c b/src/mainboard/supermicro/h8scm_fam10/mainboard.c
index afce33db21..9ff43396ca 100644
--- a/src/mainboard/supermicro/h8scm_fam10/mainboard.c
+++ b/src/mainboard/supermicro/h8scm_fam10/mainboard.c
@@ -23,10 +23,6 @@
 #include <southbridge/amd/sb700/sb700.h>
 #include <southbridge/amd/sr5650/cmn.h>
 
-
-void set_pcie_reset(void);
-void set_pcie_dereset(void);
-
 /*
  * TODO: Add the routine info of each PCIE_RESET_L.
  * TODO: Add the reset of each PCIE_RESET_L.
diff --git a/src/southbridge/amd/sr5650/cmn.h b/src/southbridge/amd/sr5650/cmn.h
index 0c0fd29ca7..e44d1e89c0 100644
--- a/src/southbridge/amd/sr5650/cmn.h
+++ b/src/southbridge/amd/sr5650/cmn.h
@@ -146,4 +146,8 @@ static inline void set_pcie_enable_bits(device_t dev, u32 reg_pos, u32 mask, u32
 		nb_write_index(dev, NBPCIE_INDEX, reg_pos, reg);
 	}
 }
+
+void set_pcie_reset(void);
+void set_pcie_dereset(void);
+
 #endif /* __SR5650_CMN_H__ */
diff --git a/src/southbridge/amd/sr5650/sr5650.c b/src/southbridge/amd/sr5650/sr5650.c
index ec78467d0e..1962ea3277 100644
--- a/src/southbridge/amd/sr5650/sr5650.c
+++ b/src/southbridge/amd/sr5650/sr5650.c
@@ -32,9 +32,6 @@
 /*
  * extern function declaration
  */
-extern void set_pcie_dereset(void);
-extern void set_pcie_reset(void);
-
 struct resource * sr5650_retrieve_cpu_mmio_resource() {
 	struct device *domain;
 	struct resource *res;