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-rw-r--r--src/mainboard/asrock/939a785gmh/romstage.c5
-rw-r--r--src/mainboard/kontron/kt690/romstage.c5
-rw-r--r--src/mainboard/lippert/toucan-af/romstage.c5
-rw-r--r--src/mainboard/supermicro/h8qgi/romstage.c3
-rw-r--r--src/mainboard/supermicro/h8scm/romstage.c3
-rw-r--r--src/mainboard/tyan/s8226/romstage.c5
-rw-r--r--src/superio/winbond/w83627dhg/early_serial.c10
-rw-r--r--src/superio/winbond/w83627dhg/w83627dhg.h7
8 files changed, 19 insertions, 24 deletions
diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c
index edc5830730..ce0a6ac268 100644
--- a/src/mainboard/asrock/939a785gmh/romstage.c
+++ b/src/mainboard/asrock/939a785gmh/romstage.c
@@ -37,7 +37,8 @@
#include <spd.h>
#include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "superio/winbond/w83627dhg/w83627dhg.h"
+#include <superio/winbond/common/winbond.h>
+#include <superio/winbond/w83627dhg/w83627dhg.h>
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
#include "southbridge/amd/rs780/early_setup.c"
@@ -153,7 +154,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sb7xx_51xx_lpc_init();
sio_init();
- w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
diff --git a/src/mainboard/kontron/kt690/romstage.c b/src/mainboard/kontron/kt690/romstage.c
index 52e54d4e07..4e45dc4f18 100644
--- a/src/mainboard/kontron/kt690/romstage.c
+++ b/src/mainboard/kontron/kt690/romstage.c
@@ -38,7 +38,8 @@
#include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c"
#include "northbridge/amd/amdk8/debug.c"
-#include "superio/winbond/w83627dhg/w83627dhg.h"
+#include <superio/winbond/common/winbond.h>
+#include <superio/winbond/w83627dhg/w83627dhg.h>
#include <cpu/amd/mtrr.h>
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
@@ -89,7 +90,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enable_rs690_dev8();
sb600_lpc_init();
- w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
diff --git a/src/mainboard/lippert/toucan-af/romstage.c b/src/mainboard/lippert/toucan-af/romstage.c
index 9f8cf1ade3..93ff521be7 100644
--- a/src/mainboard/lippert/toucan-af/romstage.c
+++ b/src/mainboard/lippert/toucan-af/romstage.c
@@ -32,7 +32,8 @@
#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
-#include "superio/winbond/w83627dhg/w83627dhg.h"
+#include <superio/winbond/common/winbond.h>
+#include <superio/winbond/w83627dhg/w83627dhg.h>
#include "cpu/x86/lapic.h"
#include "drivers/pc80/i8254.c"
#include "drivers/pc80/i8259.c"
@@ -69,7 +70,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sb_Poweron_Init();
post_code(0x31);
- w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
}
diff --git a/src/mainboard/supermicro/h8qgi/romstage.c b/src/mainboard/supermicro/h8qgi/romstage.c
index acb05ab665..f9d3ba1a6e 100644
--- a/src/mainboard/supermicro/h8qgi/romstage.c
+++ b/src/mainboard/supermicro/h8qgi/romstage.c
@@ -32,7 +32,8 @@
#include <nb_cimx.h>
#include <sb_cimx.h>
#include "superio/nuvoton/wpcm450/wpcm450.h"
-#include "superio/winbond/w83627dhg/w83627dhg.h"
+#include <superio/winbond/common/winbond.h>
+#include <superio/winbond/w83627dhg/w83627dhg.h>
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
diff --git a/src/mainboard/supermicro/h8scm/romstage.c b/src/mainboard/supermicro/h8scm/romstage.c
index 8801c45c8e..0f5abdf30e 100644
--- a/src/mainboard/supermicro/h8scm/romstage.c
+++ b/src/mainboard/supermicro/h8scm/romstage.c
@@ -34,7 +34,8 @@
#include "src/drivers/pc80/i8254.c"
#include "src/drivers/pc80/i8259.c"
#include "superio/nuvoton/wpcm450/wpcm450.h"
-#include "superio/winbond/w83627dhg/w83627dhg.h"
+#include <superio/winbond/common/winbond.h>
+#include <superio/winbond/w83627dhg/w83627dhg.h>
#define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1)
diff --git a/src/mainboard/tyan/s8226/romstage.c b/src/mainboard/tyan/s8226/romstage.c
index 49361a80ce..d0b00b3ed5 100644
--- a/src/mainboard/tyan/s8226/romstage.c
+++ b/src/mainboard/tyan/s8226/romstage.c
@@ -32,7 +32,8 @@
#include <nb_cimx.h>
#include <sb_cimx.h>
#include "superio/nuvoton/wpcm450/wpcm450.h"
-#include "superio/winbond/w83627dhg/w83627dhg.h"
+#include <superio/winbond/common/winbond.h>
+#include <superio/winbond/w83627dhg/w83627dhg.h>
#include "src/drivers/pc80/i8254.c"
#include "src/drivers/pc80/i8259.c"
@@ -54,7 +55,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sb7xx_51xx_enable_wideio(0, 0x1600); /* though UARTs are on the NUVOTON BMC */
w83627dhg_set_clksel_48(DUMMY_DEV);
- w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
sb7xx_51xx_disable_wideio(0);
post_code(0x34);
diff --git a/src/superio/winbond/w83627dhg/early_serial.c b/src/superio/winbond/w83627dhg/early_serial.c
index ec9e81e00a..67aaa93343 100644
--- a/src/superio/winbond/w83627dhg/early_serial.c
+++ b/src/superio/winbond/w83627dhg/early_serial.c
@@ -37,16 +37,6 @@ void pnp_exit_ext_func_mode(device_t dev)
outb(0xaa, port);
}
-void w83627dhg_enable_serial(device_t dev, u16 iobase)
-{
- pnp_enter_ext_func_mode(dev);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
- pnp_set_enable(dev, 1);
- pnp_exit_ext_func_mode(dev);
-}
-
/**
* Select Pin 89, Pin 90 function as I2C interface SDA, SCL.
* {Pin 89, Pin 90} function can be selected as {GP33, GP32}, or
diff --git a/src/superio/winbond/w83627dhg/w83627dhg.h b/src/superio/winbond/w83627dhg/w83627dhg.h
index 9e83d34c44..08ea04fa2a 100644
--- a/src/superio/winbond/w83627dhg/w83627dhg.h
+++ b/src/superio/winbond/w83627dhg/w83627dhg.h
@@ -19,8 +19,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#ifndef SUPERIO_WINBOND_W83627DHG_W83627DHG_H
-#define SUPERIO_WINBOND_W83627DHG_W83627DHG_H
+#ifndef SUPERIO_WINBOND_W83627DHG_H
+#define SUPERIO_WINBOND_W83627DHG_H
#define W83627DHG_FDC 0 /* Floppy */
#define W83627DHG_PP 1 /* Parallel port */
@@ -54,8 +54,7 @@
void pnp_enter_ext_func_mode(device_t dev);
void pnp_exit_ext_func_mode(device_t dev);
-void w83627dhg_enable_serial(device_t dev, u16 iobase);
void w83627dhg_enable_i2c(device_t dev);
void w83627dhg_set_clksel_48(device_t dev);
-#endif
+#endif /* SUPERIO_WINBOND_W83627DHG_H */
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 14:34:51 +0000