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-rw-r--r--src/mainboard/google/brya/Kconfig1
-rw-r--r--src/mainboard/google/brya/Kconfig.name2
-rw-r--r--src/mainboard/google/brya/variants/uldren/include/variant/gpio.h4
-rw-r--r--src/mainboard/google/brya/variants/uldren/overridetree.cb314
4 files changed, 319 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 0080400994..1534a5456c 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -160,6 +160,7 @@ config DRIVER_TPM_I2C_BUS
default 0x1 if BOARD_GOOGLE_AURASH
default 0x1 if BOARD_GOOGLE_HADES
default 0x0 if BOARD_GOOGLE_YAVILLA
+ default 0x0 if BOARD_GOOGLE_ULDREN
config DRIVER_TPM_I2C_ADDR
hex
diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name
index 706fdfd001..fb8bb5e533 100644
--- a/src/mainboard/google/brya/Kconfig.name
+++ b/src/mainboard/google/brya/Kconfig.name
@@ -361,6 +361,8 @@ config BOARD_GOOGLE_HADES
config BOARD_GOOGLE_ULDREN
bool "-> Uldren"
select BOARD_GOOGLE_BASEBOARD_NISSA
+ select DRIVERS_I2C_CS42L42
+ select HAVE_WWAN_POWER_SEQUENCE
config BOARD_GOOGLE_YAVILLA
bool "-> Yavilla"
diff --git a/src/mainboard/google/brya/variants/uldren/include/variant/gpio.h b/src/mainboard/google/brya/variants/uldren/include/variant/gpio.h
index c4fe342621..c96b01fc15 100644
--- a/src/mainboard/google/brya/variants/uldren/include/variant/gpio.h
+++ b/src/mainboard/google/brya/variants/uldren/include/variant/gpio.h
@@ -5,4 +5,8 @@
#include <baseboard/gpio.h>
+#define WWAN_FCPO GPP_D6
+#define WWAN_RST GPP_F12
+#define T2_OFF_MS 20
+
#endif
diff --git a/src/mainboard/google/brya/variants/uldren/overridetree.cb b/src/mainboard/google/brya/variants/uldren/overridetree.cb
index 4f2c04a57a..dbe46ed393 100644
--- a/src/mainboard/google/brya/variants/uldren/overridetree.cb
+++ b/src/mainboard/google/brya/variants/uldren/overridetree.cb
@@ -1,6 +1,316 @@
chip soc/intel/alderlake
+ register "sagv" = "SaGv_Enabled"
- device domain 0 on
- end
+ # SOC Aux orientation override:
+ # This is a bitfield that corresponds to up to 4 TCSS ports.
+ # Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
+ # TcssAuxOri = 0101b
+ # Bit0,Bit2 set to "1" indicates no retimer on USBC Ports
+ # Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
+ # motherboard to USBC connector
+
+ register "tcss_aux_ori" = "5"
+ register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
+ register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_A21, .pad_auxn_dc = GPP_A22}"
+
+ register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # World Facing Camera
+ register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN
+ register "serial_io_i2c_mode" = "{
+ [PchSerialIoIndexI2C0] = PchSerialIoPci,
+ [PchSerialIoIndexI2C1] = PchSerialIoPci,
+ [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
+ [PchSerialIoIndexI2C3] = PchSerialIoPci,
+ [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
+ [PchSerialIoIndexI2C5] = PchSerialIoPci,
+ }"
+
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| I2C0 | TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| I2C1 | Touchscreen |
+ #| I2C2 | |
+ #| I2C3 | Audio |
+ #| I2C5 | Trackpad |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .i2c[0] = {
+ .early_init = 1,
+ .speed = I2C_SPEED_FAST_PLUS,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST_PLUS,
+ .scl_lcnt = 55,
+ .scl_hcnt = 30,
+ .sda_hold = 7,
+ }
+ },
+ .i2c[1] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 158,
+ .scl_hcnt = 79,
+ .sda_hold = 7,
+ }
+ },
+ .i2c[3] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 158,
+ .scl_hcnt = 79,
+ .sda_hold = 7,
+ }
+ },
+ .i2c[5] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 158,
+ .scl_hcnt = 79,
+ .sda_hold = 7,
+ }
+ },
+ }"
+
+ device domain 0 on
+ device ref cnvi_wifi on
+ chip drivers/wifi/generic
+ register "wake" = "GPE0_PME_B0"
+ register "enable_cnvi_ddr_rfim" = "true"
+ device generic 0 on end
+ end
+ end
+ device ref i2c1 on
+ chip drivers/i2c/hid
+ register "generic.hid" = ""WDHT0002""
+ register "generic.desc" = ""WDT Touchscreen""
+ register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
+ register "generic.detect" = "1"
+ register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
+ register "generic.reset_delay_ms" = "20"
+ register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
+ register "generic.stop_delay_ms" = "130"
+ register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
+ register "generic.enable_delay_ms" = "1"
+ register "generic.has_power_resource" = "1"
+ register "hid_desc_reg_offset" = "0x20"
+ device i2c 2c on end
+ end
+ chip drivers/i2c/generic
+ register "hid" = ""ELAN0001""
+ register "desc" = ""ELAN Touchscreen""
+ register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
+ register "detect" = "1"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
+ register "reset_delay_ms" = "20"
+ register "reset_off_delay_ms" = "2"
+ register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
+ register "stop_delay_ms" = "280"
+ register "stop_off_delay_ms" = "2"
+ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
+ register "enable_delay_ms" = "1"
+ register "has_power_resource" = "1"
+ device i2c 10 on end
+ end
+ chip drivers/i2c/hid
+ register "generic.hid" = ""ELAN900C""
+ register "generic.desc" = ""ELAN Touchscreen""
+ register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
+ register "generic.detect" = "1"
+ register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
+ register "generic.reset_delay_ms" = "300"
+ register "generic.reset_off_delay_ms" = "1"
+ register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
+ register "generic.stop_delay_ms" = "300"
+ register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
+ register "generic.enable_delay_ms" = "6"
+ register "generic.has_power_resource" = "1"
+ register "hid_desc_reg_offset" = "0x01"
+ device i2c 16 on end
+ end
+ chip drivers/i2c/hid
+ register "generic.hid" = ""GXTP7996""
+ register "generic.desc" = ""Goodix Touchscreen""
+ register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
+ register "generic.detect" = "1"
+ register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
+ register "generic.reset_delay_ms" = "100"
+ register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
+ register "generic.stop_delay_ms" = "300"
+ register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
+ register "generic.enable_delay_ms" = "10"
+ register "generic.has_power_resource" = "1"
+ register "hid_desc_reg_offset" = "0x01"
+ device i2c 5d on end
+ end
+ chip drivers/i2c/hid
+ register "generic.hid" = ""GTCH7502""
+ register "generic.desc" = ""G2TOUCH Touchscreen""
+ register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
+ register "generic.detect" = "1"
+ register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
+ register "generic.reset_delay_ms" = "100"
+ register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
+ register "generic.stop_delay_ms" = "30"
+ register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
+ register "generic.enable_delay_ms" = "30"
+ register "generic.has_power_resource" = "1"
+ register "hid_desc_reg_offset" = "0x01"
+ device i2c 40 on end
+ end
+ end
+ device ref i2c3 on
+ chip drivers/i2c/cs42l42
+ register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B15)"
+ register "ts_inv" = "true"
+ register "ts_dbnc_rise" = "RISE_DEB_1000_MS"
+ register "ts_dbnc_fall" = "FALL_DEB_0_MS"
+ register "btn_det_init_dbnce" = "100"
+ register "btn_det_event_dbnce" = "10"
+ register "bias_lvls[0]" = "15"
+ register "bias_lvls[1]" = "8"
+ register "bias_lvls[2]" = "4"
+ register "bias_lvls[3]" = "1"
+ register "hs_bias_ramp_rate" = "HSBIAS_RAMP_SLOW"
+ register "hs_bias_sense_disable" = "true"
+ device i2c 48 on end
+ end
+ end
+ device ref i2c5 on
+ chip drivers/i2c/generic
+ register "hid" = ""ELAN0000""
+ register "desc" = ""ELAN Touchpad""
+ register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
+ register "wake" = "GPE0_DW2_14"
+ register "detect" = "1"
+ device i2c 15 on end
+ end
+ chip drivers/i2c/hid
+ register "generic.hid" = ""GXTP7863""
+ register "generic.desc" = ""Goodix Touchpad""
+ register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)"
+ register "generic.wake" = "GPE0_DW2_14"
+ register "generic.detect" = "1"
+ register "hid_desc_reg_offset" = "0x20"
+ device i2c 2c on end
+ end
+ end
+ device ref hda on
+ chip drivers/generic/max98357a
+ register "hid" = ""MX98360A""
+ register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
+ register "sdmode_delay" = "5"
+ device generic 0 on end
+ end
+ end
+ device ref pch_espi on
+ chip ec/google/chromeec
+ use conn0 as mux_conn[0]
+ use conn1 as mux_conn[1]
+ device pnp 0c09.0 on end
+ end
+ end
+ device ref pmc hidden
+ chip drivers/intel/pmc_mux
+ device generic 0 on
+ chip drivers/intel/pmc_mux/conn
+ use usb2_port1 as usb2_port
+ use tcss_usb3_port1 as usb3_port
+ device generic 0 alias conn0 on end
+ end
+ chip drivers/intel/pmc_mux/conn
+ use usb2_port2 as usb2_port
+ use tcss_usb3_port2 as usb3_port
+ device generic 1 alias conn1 on end
+ end
+ end
+ end
+ end
+ device ref tcss_xhci on
+ chip drivers/usb/acpi
+ device ref tcss_root_hub on
+ chip drivers/usb/acpi
+ register "desc" = ""USB3 Type-C Port C0 (MLB)""
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
+ device ref tcss_usb3_port1 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB3 Type-C Port C1 (DB)""
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
+ device ref tcss_usb3_port2 on end
+ end
+ end
+ end
+ end
+ device ref xhci on
+ chip drivers/usb/acpi
+ device ref xhci_root_hub on
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 Type-C Port C0 (MLB)""
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
+ device ref usb2_port1 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 Type-C Port C1 (DB)""
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
+ device ref usb2_port2 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 Type-A Port A0 (MLB)""
+ register "type" = "UPC_TYPE_A"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
+ device ref usb2_port3 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 WWAN""
+ register "type" = "UPC_TYPE_INTERNAL"
+ device ref usb2_port4 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 User Facing Camera""
+ register "type" = "UPC_TYPE_INTERNAL"
+ device ref usb2_port6 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 World Facing Camera""
+ register "type" = "UPC_TYPE_INTERNAL"
+ device ref usb2_port7 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 Bluetooth""
+ register "type" = "UPC_TYPE_INTERNAL"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
+ device ref usb2_port10 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB3 Type-A Port A0 (MLB)""
+ register "type" = "UPC_TYPE_USB3_A"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
+ device ref usb3_port1 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB3 WWAN""
+ register "type" = "UPC_TYPE_INTERNAL"
+ device ref usb3_port2 on end
+ end
+ end
+ end
+ end
+ end
end
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-28 17:00:00 +0000