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-rw-r--r--src/soc/intel/alderlake/romstage/fsp_params.c2
-rw-r--r--src/soc/intel/alderlake/romstage/romstage.c4
2 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index f18e1f48b0..50343fb7a7 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -300,6 +300,8 @@ static void fill_fspm_vtd_params(FSP_M_CONFIG *m_cfg,
m_cfg->VtdIgdEnable = m_cfg->InternalGfx;
m_cfg->VtdIpuEnable = m_cfg->SaIpuEnable;
+ m_cfg->PreBootDmaMask = CONFIG(ENABLE_EARLY_DMA_PROTECTION);
+
if (m_cfg->VtdIgdEnable && m_cfg->VtdBaseAddress[VTD_GFX] == 0) {
m_cfg->VtdIgdEnable = 0;
printk(BIOS_ERR, "Requested IGD VT-d, but GFXVT_BASE_ADDRESS is 0\n");
diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c
index 2c0bdea11a..a3273e610a 100644
--- a/src/soc/intel/alderlake/romstage/romstage.c
+++ b/src/soc/intel/alderlake/romstage/romstage.c
@@ -13,6 +13,7 @@
#include <intelblocks/pmclib.h>
#include <intelblocks/smbus.h>
#include <intelblocks/thermal.h>
+#include <intelblocks/vtd.h>
#include <intelbasecode/debug_feature.h>
#include <memory_info.h>
#include <soc/intel/common/smbios.h>
@@ -227,4 +228,7 @@ void mainboard_romstage_entry(void)
* RUN_FSP_GOP is selected
*/
early_graphics_stop();
+
+ if (CONFIG(ENABLE_EARLY_DMA_PROTECTION))
+ vtd_enable_dma_protection();
}