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-rw-r--r--src/mainboard/google/guybrush/Kconfig1
-rw-r--r--src/mainboard/google/guybrush/variants/baseboard/devicetree.cb8
2 files changed, 8 insertions, 1 deletions
diff --git a/src/mainboard/google/guybrush/Kconfig b/src/mainboard/google/guybrush/Kconfig
index 0e7d15e755..14ab695caf 100644
--- a/src/mainboard/google/guybrush/Kconfig
+++ b/src/mainboard/google/guybrush/Kconfig
@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
select DRIVERS_GENERIC_GPIO_KEYS
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
+ select DRIVERS_PCIE_RTD3_DEVICE
select DRIVERS_UART_ACPI
select DRIVERS_WIFI_GENERIC
select EC_GOOGLE_CHROMEEC
diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
index 2c0c5d97c4..790c13c749 100644
--- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
@@ -193,7 +193,13 @@ chip soc/amd/cezanne
end # WLAN
device ref gpp_bridge_1 on end # SD
device ref gpp_bridge_2 on end # WWAN
- device ref gpp_bridge_3 on end # NVMe
+ device ref gpp_bridge_3 on
+ # Required so the NVMe gets placed into D3 when entering S0i3.
+ chip drivers/pcie/rtd3/device
+ register "name" = ""NVME""
+ device pci 00.0 on end
+ end
+ end # NVMe
device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
device ref gfx on end # Internal GPU (GFX)