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-rw-r--r--src/mainboard/asus/f2a85-m/romstage.c3
-rw-r--r--src/southbridge/amd/agesa/hudson/Makefile.inc1
2 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c
index b7bcf43d5e..5773eba047 100644
--- a/src/mainboard/asus/f2a85-m/romstage.c
+++ b/src/mainboard/asus/f2a85-m/romstage.c
@@ -101,7 +101,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* set DDR3 voltage */
byte = CONFIG_BOARD_ASUS_F2A85_M_DDR3_VOLT_VAL;
- if (!byte)
+ /* default is byte = 0x0, so no need to set it in this case */
+ if (byte)
do_smbus_write_byte(0xb20, 0x15, 0x3, byte);
}
diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc
index da029a0383..7802600c4e 100644
--- a/src/southbridge/amd/agesa/hudson/Makefile.inc
+++ b/src/southbridge/amd/agesa/hudson/Makefile.inc
@@ -1,3 +1,4 @@
+romstage-y += smbus.c
ramstage-y += hudson.c
ramstage-y += usb.c
ramstage-y += lpc.c