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-rw-r--r--src/soc/mediatek/mt8186/Makefile.inc4
-rw-r--r--src/soc/mediatek/mt8186/include/soc/addressmap.h1
-rw-r--r--src/soc/mediatek/mt8186/include/soc/pmif.h16
-rw-r--r--src/soc/mediatek/mt8186/mt6366.c2
-rw-r--r--src/soc/mediatek/mt8186/pmif.c21
5 files changed, 42 insertions, 2 deletions
diff --git a/src/soc/mediatek/mt8186/Makefile.inc b/src/soc/mediatek/mt8186/Makefile.inc
index 0d56f15009..5d327e067e 100644
--- a/src/soc/mediatek/mt8186/Makefile.inc
+++ b/src/soc/mediatek/mt8186/Makefile.inc
@@ -40,7 +40,7 @@ romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
romstage-y += ../common/timer.c timer.c
romstage-y += ../common/uart.c
romstage-y += ../common/wdt.c wdt.c
-romstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6366.c
+romstage-y += ../common/pmic_wrap.c pmic_wrap.c pmif.c mt6366.c
romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c
ramstage-y += ../common/auxadc.c
@@ -64,7 +64,7 @@ ramstage-y += ../common/timer.c timer.c
ramstage-y += ../common/uart.c
ramstage-y += ../common/usb.c usb.c
ramstage-y += ../common/wdt.c wdt.c
-ramstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6366.c
+ramstage-y += ../common/pmic_wrap.c pmic_wrap.c pmif.c mt6366.c
ramstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c
BL31_MAKEARGS += PLAT=mt8186
diff --git a/src/soc/mediatek/mt8186/include/soc/addressmap.h b/src/soc/mediatek/mt8186/include/soc/addressmap.h
index c90e0cda79..069e31d412 100644
--- a/src/soc/mediatek/mt8186/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8186/include/soc/addressmap.h
@@ -30,6 +30,7 @@ enum {
PWRAP_BASE = IO_PHYS + 0x0000D000,
DEVAPC_AO_INFRA_PERI_BASE = IO_PHYS + 0x0000E000,
DEVAPC_AO_MM_BASE = IO_PHYS + 0x0000F000,
+ PMIF_BASE = IO_PHYS + 0x00015000,
SYSTIMER_BASE = IO_PHYS + 0x00017000,
I2C0_DMA_BASE = IO_PHYS + 0x00200100,
I2C1_DMA_BASE = IO_PHYS + 0x00200200,
diff --git a/src/soc/mediatek/mt8186/include/soc/pmif.h b/src/soc/mediatek/mt8186/include/soc/pmif.h
new file mode 100644
index 0000000000..0e1e1a276d
--- /dev/null
+++ b/src/soc/mediatek/mt8186/include/soc/pmif.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file is created based on MT8186 Functional Specification
+ * Chapter number: 3.7
+ */
+
+#ifndef __SOC_MEDIATEK_MT8186_PMIF_H__
+#define __SOC_MEDIATEK_MT8186_PMIF_H__
+
+#include <soc/addressmap.h>
+#include <types.h>
+
+void pmif_spmi_set_lp_mode(void);
+
+#endif /*__SOC_MEDIATEK_MT8186_PMIF_H__*/
diff --git a/src/soc/mediatek/mt8186/mt6366.c b/src/soc/mediatek/mt8186/mt6366.c
index 30ae5e0683..8dd2997807 100644
--- a/src/soc/mediatek/mt8186/mt6366.c
+++ b/src/soc/mediatek/mt8186/mt6366.c
@@ -10,6 +10,7 @@
#include <delay.h>
#include <soc/mt6366.h>
#include <soc/pmic_wrap.h>
+#include <soc/pmif.h>
#include <soc/regulator.h>
#include <timer.h>
@@ -953,6 +954,7 @@ void mt6366_init(void)
wk_sleep_voltage_by_ddr();
wk_power_down_seq();
mt6366_lp_setting();
+ pmif_spmi_set_lp_mode();
while (!stopwatch_expired(&voltage_settled))
/* wait for voltages to settle */;
diff --git a/src/soc/mediatek/mt8186/pmif.c b/src/soc/mediatek/mt8186/pmif.c
new file mode 100644
index 0000000000..b9096092d4
--- /dev/null
+++ b/src/soc/mediatek/mt8186/pmif.c
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file is created based on MT8186 Functional Specification
+ * Chapter number: 3.7
+ */
+
+#include <device/mmio.h>
+#include <soc/pmif.h>
+
+#define SLEEP_PROT_CTRL 0x3F0
+
+DEFINE_BITFIELD(SPM_SLEEP_REQ_SEL, 1, 0)
+DEFINE_BITFIELD(SCP_SLEEP_REQ_SEL, 10, 9)
+
+void pmif_spmi_set_lp_mode(void)
+{
+ SET32_BITFIELDS((void *)(PMIF_BASE + SLEEP_PROT_CTRL),
+ SPM_SLEEP_REQ_SEL, 0,
+ SCP_SLEEP_REQ_SEL, 0);
+}