2 files changed, 32 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/moli/Makefile.inc b/src/mainboard/google/brya/variants/moli/Makefile.inc
index aa151d64f5..f5c589792d 100644
--- a/src/mainboard/google/brya/variants/moli/Makefile.inc
+++ b/src/mainboard/google/brya/variants/moli/Makefile.inc
@@ -1,6 +1,7 @@
 bootblock-y += gpio.c
 
 romstage-y += gpio.c
+romstage-y += memory.c
 
 ramstage-y += gpio.c
 ramstage-y += ramstage.c
diff --git a/src/mainboard/google/brya/variants/moli/memory.c b/src/mainboard/google/brya/variants/moli/memory.c
new file mode 100644
index 0000000000..ad33e9c9c7
--- /dev/null
+++ b/src/mainboard/google/brya/variants/moli/memory.c
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+#include <gpio.h>
+#include <soc/romstage.h>
+
+static const struct mb_cfg ddr4_mem_config = {
+	.type = MEM_TYPE_DDR4,
+
+	.rcomp = {
+		/* Baseboard uses only 100ohm Rcomp resistors */
+		.resistor = 100,
+
+		/* Baseboard Rcomp target values */
+		.targets = {50, 20, 25, 25, 25},
+	},
+
+	.ect = 1, /* Early Command Training */
+
+	.UserBd = BOARD_TYPE_MOBILE,
+
+	.ddr_config = {
+		.dq_pins_interleaved = false,
+	},
+};
+
+const struct mb_cfg *variant_memory_params(void)
+{
+	return &ddr4_mem_config;
+}