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-rw-r--r--src/mainboard/google/myst/ec.c15
-rw-r--r--src/mainboard/google/myst/mainboard.c5
2 files changed, 20 insertions, 0 deletions
diff --git a/src/mainboard/google/myst/ec.c b/src/mainboard/google/myst/ec.c
index c369f14025..060119dc3c 100644
--- a/src/mainboard/google/myst/ec.c
+++ b/src/mainboard/google/myst/ec.c
@@ -1,9 +1,21 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <acpi/acpi.h>
+#include <amdblocks/smi.h>
#include <ec/google/chromeec/ec.h>
+#include <gpio.h>
+#include <soc/smi.h>
#include <variant/ec.h>
+static const struct sci_source espi_sci_sources[] = {
+ {
+ .scimap = SMITYPE_ESPI_SCI_B,
+ .gpe = EC_SCI_GPI,
+ .direction = SMI_SCI_LVL_HIGH, /* enum smi_sci_lvl */
+ .level = SMI_SCI_EDG, /* enum smi_sci_dir */
+ }
+};
+
void mainboard_ec_init(void)
{
const struct google_chromeec_event_info info = {
@@ -15,4 +27,7 @@ void mainboard_ec_init(void)
};
google_chromeec_events_init(&info, acpi_is_wakeup_s3());
+
+ /* Configure eSPI SCI events */
+ gpe_configure_sci(espi_sci_sources, ARRAY_SIZE(espi_sci_sources));
}
diff --git a/src/mainboard/google/myst/mainboard.c b/src/mainboard/google/myst/mainboard.c
index bdd4c762d3..e433c98035 100644
--- a/src/mainboard/google/myst/mainboard.c
+++ b/src/mainboard/google/myst/mainboard.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
+#include <amdblocks/acpimmio.h>
#include <amdblocks/amd_pci_util.h>
#include <baseboard/variants.h>
#include <console/console.h>
@@ -37,6 +38,10 @@ static void mainboard_init(void *chip_info)
static void mainboard_enable(struct device *dev)
{
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
+
+ /* TODO: b/184678786 - Move into espi_config */
+ /* Unmask eSPI IRQ 1 (Keyboard) */
+ pm_write32(PM_ESPI_INTR_CTRL, PM_ESPI_DEV_INTR_MASK & ~(BIT(1)));
}
struct chip_operations mainboard_ops = {