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-rw-r--r--src/soc/amd/common/psp_verstage/psp_verstage.c10
-rw-r--r--src/soc/amd/picasso/Kconfig1
2 files changed, 10 insertions, 1 deletions
diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c
index 2265e17e09..5c59c4f4e4 100644
--- a/src/soc/amd/common/psp_verstage/psp_verstage.c
+++ b/src/soc/amd/common/psp_verstage/psp_verstage.c
@@ -238,6 +238,16 @@ void Main(void)
reboot_into_recovery(ctx, retval);
post_code(POSTCODE_UPDATE_BOOT_REGION);
+
+ /*
+ * Since psp_verstage doesn't load next stage we never call
+ * any cbfs API on RO path. However we still need to initialize
+ * RO CBFS MCACHE manually to pass it in transfer_buffer.
+ * In RW path, MCACHE build will be skipped for RO region since
+ * we already built here.
+ */
+ cbfs_get_boot_device(true);
+
retval = update_boot_region(ctx);
if (retval)
reboot_into_recovery(ctx, retval);
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index b93027734a..4bfd093d85 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -67,7 +67,6 @@ config CPU_SPECIFIC_OPTIONS
select FSP_COMPRESS_FSP_S_LZMA
select UDK_2017_BINDING
select HAVE_CF9_RESET
- select NO_CBFS_MCACHE if VBOOT_STARTS_BEFORE_BOOTBLOCK
config SOC_AMD_COMMON_BLOCK_UCODE_SIZE
default 3200