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-rw-r--r--src/soc/intel/alderlake/acpi/southbridge.asl1
-rw-r--r--src/soc/intel/alderlake/chip.c1
-rw-r--r--src/soc/intel/alderlake/include/soc/itss.h10
-rw-r--r--src/soc/intel/apollolake/include/soc/itss.h6
-rw-r--r--src/soc/intel/cannonlake/include/soc/itss.h10
-rw-r--r--src/soc/intel/common/block/include/intelblocks/itss.h4
-rw-r--r--src/soc/intel/common/block/itss/itss.c1
-rw-r--r--src/soc/intel/elkhartlake/acpi/southbridge.asl1
-rw-r--r--src/soc/intel/elkhartlake/chip.c1
-rw-r--r--src/soc/intel/elkhartlake/include/soc/itss.h10
-rw-r--r--src/soc/intel/jasperlake/acpi/southbridge.asl1
-rw-r--r--src/soc/intel/jasperlake/chip.c1
-rw-r--r--src/soc/intel/jasperlake/include/soc/itss.h10
-rw-r--r--src/soc/intel/meteorlake/acpi/southbridge.asl1
-rw-r--r--src/soc/intel/meteorlake/chip.c1
-rw-r--r--src/soc/intel/meteorlake/include/soc/itss.h10
-rw-r--r--src/soc/intel/skylake/acpi/pch.asl1
-rw-r--r--src/soc/intel/skylake/chip.c2
-rw-r--r--src/soc/intel/skylake/include/soc/itss.h6
-rw-r--r--src/soc/intel/tigerlake/acpi/southbridge.asl1
-rw-r--r--src/soc/intel/tigerlake/chip.c1
-rw-r--r--src/soc/intel/tigerlake/include/soc/itss.h10
-rw-r--r--src/soc/intel/xeon_sp/gnr/soc_acpi.c1
-rw-r--r--src/soc/intel/xeon_sp/include/soc/itss.h10
24 files changed, 9 insertions, 92 deletions
diff --git a/src/soc/intel/alderlake/acpi/southbridge.asl b/src/soc/intel/alderlake/acpi/southbridge.asl
index af641db2fb..651d26c4ef 100644
--- a/src/soc/intel/alderlake/acpi/southbridge.asl
+++ b/src/soc/intel/alderlake/acpi/southbridge.asl
@@ -2,7 +2,6 @@
#include <intelblocks/itss.h>
#include <intelblocks/pcr.h>
-#include <soc/itss.h>
#include <soc/pcr_ids.h>
/* PCR access */
diff --git a/src/soc/intel/alderlake/chip.c b/src/soc/intel/alderlake/chip.c
index 8979ae0f65..23a05ded7a 100644
--- a/src/soc/intel/alderlake/chip.c
+++ b/src/soc/intel/alderlake/chip.c
@@ -15,7 +15,6 @@
#include <intelblocks/xdci.h>
#include <soc/hsphy.h>
#include <soc/intel/common/vbt.h>
-#include <soc/itss.h>
#include <soc/p2sb.h>
#include <soc/pci_devs.h>
#include <soc/pcie.h>
diff --git a/src/soc/intel/alderlake/include/soc/itss.h b/src/soc/intel/alderlake/include/soc/itss.h
deleted file mode 100644
index 0ea8ff1d41..0000000000
--- a/src/soc/intel/alderlake/include/soc/itss.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef SOC_INTEL_ADL_ITSS_H
-#define SOC_INTEL_ADL_ITSS_H
-
-#define ITSS_MAX_IRQ 119
-#define IRQS_PER_IPC 32
-#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC)
-
-#endif /* SOC_INTEL_ADL_ITSS_H */
diff --git a/src/soc/intel/apollolake/include/soc/itss.h b/src/soc/intel/apollolake/include/soc/itss.h
index b88dfd8c8f..03ba785943 100644
--- a/src/soc/intel/apollolake/include/soc/itss.h
+++ b/src/soc/intel/apollolake/include/soc/itss.h
@@ -3,11 +3,9 @@
#ifndef _SOC_APOLLOLAKE_ITSS_H_
#define _SOC_APOLLOLAKE_ITSS_H_
+#include <intelblocks/itss.h>
+
#define GPIO_IRQ_START 50
#define GPIO_IRQ_END ITSS_MAX_IRQ
-#define ITSS_MAX_IRQ 119
-#define IRQS_PER_IPC 32
-#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC)
-
#endif /* _SOC_APOLLOLAKE_ITSS_H_ */
diff --git a/src/soc/intel/cannonlake/include/soc/itss.h b/src/soc/intel/cannonlake/include/soc/itss.h
deleted file mode 100644
index 902b8e236c..0000000000
--- a/src/soc/intel/cannonlake/include/soc/itss.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef SOC_INTEL_CNL_ITSS_H
-#define SOC_INTEL_CNL_ITSS_H
-
-#define ITSS_MAX_IRQ 119
-#define IRQS_PER_IPC 32
-#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC)
-
-#endif /* SOC_INTEL_CNL_ITSS_H */
diff --git a/src/soc/intel/common/block/include/intelblocks/itss.h b/src/soc/intel/common/block/include/intelblocks/itss.h
index 4d26b25b4d..84ba7b443a 100644
--- a/src/soc/intel/common/block/include/intelblocks/itss.h
+++ b/src/soc/intel/common/block/include/intelblocks/itss.h
@@ -3,6 +3,10 @@
#ifndef SOC_INTEL_COMMON_BLOCK_ITSS_H
#define SOC_INTEL_COMMON_BLOCK_ITSS_H
+#define ITSS_MAX_IRQ 119
+#define IRQS_PER_IPC 32
+#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC)
+
/* PIRQA Routing Control Register */
#define PCR_ITSS_PIRQA_ROUT 0x3100
/* PIRQB Routing Control Register */
diff --git a/src/soc/intel/common/block/itss/itss.c b/src/soc/intel/common/block/itss/itss.c
index 79ed5d0572..50e4c38790 100644
--- a/src/soc/intel/common/block/itss/itss.c
+++ b/src/soc/intel/common/block/itss/itss.c
@@ -5,7 +5,6 @@
#include <console/console.h>
#include <intelblocks/itss.h>
#include <intelblocks/pcr.h>
-#include <soc/itss.h>
#include <soc/pcr_ids.h>
#include <southbridge/intel/common/acpi_pirq_gen.h>
diff --git a/src/soc/intel/elkhartlake/acpi/southbridge.asl b/src/soc/intel/elkhartlake/acpi/southbridge.asl
index 8b0748dc62..deb626d578 100644
--- a/src/soc/intel/elkhartlake/acpi/southbridge.asl
+++ b/src/soc/intel/elkhartlake/acpi/southbridge.asl
@@ -2,7 +2,6 @@
#include <intelblocks/itss.h>
#include <intelblocks/pcr.h>
-#include <soc/itss.h>
#include <soc/pcr_ids.h>
/* PCI IRQ assignment */
diff --git a/src/soc/intel/elkhartlake/chip.c b/src/soc/intel/elkhartlake/chip.c
index f9e4e0eeee..138d625785 100644
--- a/src/soc/intel/elkhartlake/chip.c
+++ b/src/soc/intel/elkhartlake/chip.c
@@ -12,7 +12,6 @@
#include <intelblocks/systemagent.h>
#include <intelblocks/xdci.h>
#include <soc/intel/common/vbt.h>
-#include <soc/itss.h>
#include <soc/pci_devs.h>
#include <soc/pcie.h>
#include <soc/ramstage.h>
diff --git a/src/soc/intel/elkhartlake/include/soc/itss.h b/src/soc/intel/elkhartlake/include/soc/itss.h
deleted file mode 100644
index 90a4af2bca..0000000000
--- a/src/soc/intel/elkhartlake/include/soc/itss.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef SOC_INTEL_EHL_ITSS_H
-#define SOC_INTEL_EHL_ITSS_H
-
-#define ITSS_MAX_IRQ 119
-#define IRQS_PER_IPC 32
-#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC)
-
-#endif /* SOC_INTEL_EHL_ITSS_H */
diff --git a/src/soc/intel/jasperlake/acpi/southbridge.asl b/src/soc/intel/jasperlake/acpi/southbridge.asl
index a463304228..63b2dfa152 100644
--- a/src/soc/intel/jasperlake/acpi/southbridge.asl
+++ b/src/soc/intel/jasperlake/acpi/southbridge.asl
@@ -2,7 +2,6 @@
#include <intelblocks/itss.h>
#include <intelblocks/pcr.h>
-#include <soc/itss.h>
#include <soc/pcr_ids.h>
/* PCI IRQ assignment */
diff --git a/src/soc/intel/jasperlake/chip.c b/src/soc/intel/jasperlake/chip.c
index 184e6ed4c7..6b4c74c416 100644
--- a/src/soc/intel/jasperlake/chip.c
+++ b/src/soc/intel/jasperlake/chip.c
@@ -12,7 +12,6 @@
#include <intelblocks/systemagent.h>
#include <intelblocks/xdci.h>
#include <soc/intel/common/vbt.h>
-#include <soc/itss.h>
#include <soc/pci_devs.h>
#include <soc/pcie.h>
#include <soc/ramstage.h>
diff --git a/src/soc/intel/jasperlake/include/soc/itss.h b/src/soc/intel/jasperlake/include/soc/itss.h
deleted file mode 100644
index ba1a1c2bde..0000000000
--- a/src/soc/intel/jasperlake/include/soc/itss.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef SOC_INTEL_JSL_ITSS_H
-#define SOC_INTEL_JSL_ITSS_H
-
-#define ITSS_MAX_IRQ 119
-#define IRQS_PER_IPC 32
-#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC)
-
-#endif /* SOC_INTEL_JSL_ITSS_H */
diff --git a/src/soc/intel/meteorlake/acpi/southbridge.asl b/src/soc/intel/meteorlake/acpi/southbridge.asl
index e89b65653a..5e8042e5b2 100644
--- a/src/soc/intel/meteorlake/acpi/southbridge.asl
+++ b/src/soc/intel/meteorlake/acpi/southbridge.asl
@@ -2,7 +2,6 @@
#include <intelblocks/itss.h>
#include <intelblocks/pcr.h>
-#include <soc/itss.h>
#include <soc/pcr_ids.h>
/* SoC PCR access */
diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c
index 51e89dcf3a..84b9235b25 100644
--- a/src/soc/intel/meteorlake/chip.c
+++ b/src/soc/intel/meteorlake/chip.c
@@ -18,7 +18,6 @@
#include <soc/intel/common/reset.h>
#include <soc/intel/common/vbt.h>
#include <soc/iomap.h>
-#include <soc/itss.h>
#include <soc/p2sb.h>
#include <soc/pci_devs.h>
#include <soc/pcie.h>
diff --git a/src/soc/intel/meteorlake/include/soc/itss.h b/src/soc/intel/meteorlake/include/soc/itss.h
deleted file mode 100644
index cee8245c4f..0000000000
--- a/src/soc/intel/meteorlake/include/soc/itss.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef SOC_INTEL_MTL_ITSS_H
-#define SOC_INTEL_MTL_ITSS_H
-
-#define ITSS_MAX_IRQ 119
-#define IRQS_PER_IPC 32
-#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC)
-
-#endif /* SOC_INTEL_MTL_ITSS_H */
diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl
index a2ab35c2da..832663315d 100644
--- a/src/soc/intel/skylake/acpi/pch.asl
+++ b/src/soc/intel/skylake/acpi/pch.asl
@@ -4,7 +4,6 @@
#include <intelblocks/pcr.h>
#include <soc/iomap.h>
#include <soc/irq.h>
-#include <soc/itss.h>
#include <soc/gpe.h>
#include <soc/pcr_ids.h>
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 050a2722ed..d1cc6f91ac 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -22,8 +22,8 @@
#include <soc/intel/common/vbt.h>
#include <soc/interrupt.h>
#include <soc/iomap.h>
-#include <soc/irq.h>
#include <soc/itss.h>
+#include <soc/irq.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
#include <soc/systemagent.h>
diff --git a/src/soc/intel/skylake/include/soc/itss.h b/src/soc/intel/skylake/include/soc/itss.h
index 8bb0e124e1..9501b14692 100644
--- a/src/soc/intel/skylake/include/soc/itss.h
+++ b/src/soc/intel/skylake/include/soc/itss.h
@@ -3,11 +3,9 @@
#ifndef SOC_INTEL_SKL_ITSS_H
#define SOC_INTEL_SKL_ITSS_H
+#include <intelblocks/itss.h>
+
#define GPIO_IRQ_START 50
#define GPIO_IRQ_END ITSS_MAX_IRQ
-#define ITSS_MAX_IRQ 119
-#define IRQS_PER_IPC 32
-#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC)
-
#endif /* SOC_INTEL_SKL_ITSS_H */
diff --git a/src/soc/intel/tigerlake/acpi/southbridge.asl b/src/soc/intel/tigerlake/acpi/southbridge.asl
index c54bc675f2..23536b3861 100644
--- a/src/soc/intel/tigerlake/acpi/southbridge.asl
+++ b/src/soc/intel/tigerlake/acpi/southbridge.asl
@@ -2,7 +2,6 @@
#include <intelblocks/itss.h>
#include <intelblocks/pcr.h>
-#include <soc/itss.h>
#include <soc/pcr_ids.h>
/* PCR access */
diff --git a/src/soc/intel/tigerlake/chip.c b/src/soc/intel/tigerlake/chip.c
index c94e727936..f90f8adbc2 100644
--- a/src/soc/intel/tigerlake/chip.c
+++ b/src/soc/intel/tigerlake/chip.c
@@ -13,7 +13,6 @@
#include <intelblocks/systemagent.h>
#include <intelblocks/xdci.h>
#include <soc/intel/common/vbt.h>
-#include <soc/itss.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
#include <soc/soc_chip.h>
diff --git a/src/soc/intel/tigerlake/include/soc/itss.h b/src/soc/intel/tigerlake/include/soc/itss.h
deleted file mode 100644
index 0291dc8a57..0000000000
--- a/src/soc/intel/tigerlake/include/soc/itss.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef SOC_INTEL_TGL_ITSS_H
-#define SOC_INTEL_TGL_ITSS_H
-
-#define ITSS_MAX_IRQ 119
-#define IRQS_PER_IPC 32
-#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC)
-
-#endif /* SOC_INTEL_TGL_ITSS_H */
diff --git a/src/soc/intel/xeon_sp/gnr/soc_acpi.c b/src/soc/intel/xeon_sp/gnr/soc_acpi.c
index c91ed16076..54c0cd2a63 100644
--- a/src/soc/intel/xeon_sp/gnr/soc_acpi.c
+++ b/src/soc/intel/xeon_sp/gnr/soc_acpi.c
@@ -11,7 +11,6 @@
#include <soc/numa.h>
#include <soc/soc_util.h>
#include <soc/util.h>
-#include <soc/itss.h>
#include <soc/pcr_ids.h>
int soc_madt_sci_irq_polarity(int sci)
diff --git a/src/soc/intel/xeon_sp/include/soc/itss.h b/src/soc/intel/xeon_sp/include/soc/itss.h
deleted file mode 100644
index 3be9b8bcf1..0000000000
--- a/src/soc/intel/xeon_sp/include/soc/itss.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef SOC_INTEL_XEON_SP_ITSS_H
-#define SOC_INTEL_XEON_SP_ITSS_H
-
-#define ITSS_MAX_IRQ 119
-#define IRQS_PER_IPC 32
-#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC)
-
-#endif /* SOC_INTEL_XEON_SP_ITSS_H */