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-rw-r--r--src/soc/intel/alderlake/chipset.cb5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/chipset.cb b/src/soc/intel/alderlake/chipset.cb
index 9a752dda18..fc73a89829 100644
--- a/src/soc/intel/alderlake/chipset.cb
+++ b/src/soc/intel/alderlake/chipset.cb
@@ -48,6 +48,11 @@ chip soc/intel/alderlake
.tdp_pl4 = 123,
}"
+ # NOTE: if any variant wants to override this value, use the same format
+ # as register "common_soc_config.pch_thermal_trip" = "value", instead of
+ # putting it under register "common_soc_config" in overridetree.cb file.
+ register "common_soc_config.pch_thermal_trip" = "100"
+
device domain 0 on
device gpio 0 alias pch_gpio on end
device pci 00.0 alias system_agent on end