diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/mancomb/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/google/mancomb/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/mainboard/google/mancomb/ec.c | 20 | ||||
| -rw-r--r-- | src/mainboard/google/mancomb/mainboard.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/mancomb/variants/baseboard/include/baseboard/ec.h | 59 | ||||
| -rw-r--r-- | src/mainboard/google/mancomb/variants/mancomb/include/variant/ec.h | 3 |
6 files changed, 87 insertions, 2 deletions
diff --git a/src/mainboard/google/mancomb/Kconfig b/src/mainboard/google/mancomb/Kconfig index 46bf173e4b..fd598744ac 100644 --- a/src/mainboard/google/mancomb/Kconfig +++ b/src/mainboard/google/mancomb/Kconfig @@ -9,14 +9,14 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select AMD_SOC_CONSOLE_UART select BOARD_ROMSIZE_KB_16384 + select EC_GOOGLE_CHROMEEC + select EC_GOOGLE_CHROMEEC_ESPI select HAVE_ACPI_RESUME select MAINBOARD_HAS_CHROMEOS select SOC_AMD_CEZANNE select SOC_AMD_COMMON_BLOCK_USE_ESPI config CHROMEOS - select EC_GOOGLE_CHROMEEC - select EC_GOOGLE_CHROMEEC_ESPI select EC_GOOGLE_CHROMEEC_SWITCHES config VBOOT diff --git a/src/mainboard/google/mancomb/Makefile.inc b/src/mainboard/google/mancomb/Makefile.inc index f4514ab278..ccf90559c8 100644 --- a/src/mainboard/google/mancomb/Makefile.inc +++ b/src/mainboard/google/mancomb/Makefile.inc @@ -4,6 +4,7 @@ bootblock-y += bootblock.c verstage-y += verstage.c +ramstage-y += ec.c ramstage-y += mainboard.c ramstage-$(CONFIG_CHROMEOS) += chromeos.c diff --git a/src/mainboard/google/mancomb/ec.c b/src/mainboard/google/mancomb/ec.c new file mode 100644 index 0000000000..1794acfe21 --- /dev/null +++ b/src/mainboard/google/mancomb/ec.c @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <acpi/acpi.h> +#include <amdblocks/gpio_banks.h> +#include <amdblocks/smi.h> +#include <ec/google/chromeec/ec.h> +#include <variant/ec.h> + +void mainboard_ec_init(void) +{ + const struct google_chromeec_event_info info = { + .log_events = MAINBOARD_EC_LOG_EVENTS, + .sci_events = MAINBOARD_EC_SCI_EVENTS, + .s3_wake_events = MAINBOARD_EC_S3_WAKE_EVENTS, + .s5_wake_events = MAINBOARD_EC_S5_WAKE_EVENTS, + .s0ix_wake_events = MAINBOARD_EC_S0IX_WAKE_EVENTS, + }; + + google_chromeec_events_init(&info, acpi_is_wakeup_s3()); +} diff --git a/src/mainboard/google/mancomb/mainboard.c b/src/mainboard/google/mancomb/mainboard.c index 3c7e41c15c..2205f8fe61 100644 --- a/src/mainboard/google/mancomb/mainboard.c +++ b/src/mainboard/google/mancomb/mainboard.c @@ -2,6 +2,7 @@ #include <baseboard/variants.h> #include <device/device.h> +#include <variant/ec.h> #include <vendorcode/google/chromeos/chromeos.h> static void mainboard_configure_gpios(void) @@ -17,6 +18,7 @@ static void mainboard_configure_gpios(void) static void mainboard_init(void *chip_info) { mainboard_configure_gpios(); + mainboard_ec_init(); } static void mainboard_enable(struct device *dev) diff --git a/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/ec.h b/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/ec.h new file mode 100644 index 0000000000..ed05b17dff --- /dev/null +++ b/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/ec.h @@ -0,0 +1,59 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __MAINBOARD_EC_H__ +#define __MAINBOARD_EC_H__ + +#include <ec/ec.h> +#include <ec/google/chromeec/ec_commands.h> +#include <baseboard/gpio.h> +#include <soc/gpio.h> + +#define MAINBOARD_EC_SCI_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_THRESHOLD) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_START) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_STOP) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_PD_MCU) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_MUX)) + +#define MAINBOARD_EC_SMI_EVENTS (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED)) + +/* EC can wake from S5 with power button */ +#define MAINBOARD_EC_S5_WAKE_EVENTS EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON) + +/* EC can wake from S3 with lid, power button or mode change event */ +#define MAINBOARD_EC_S3_WAKE_EVENTS \ + (MAINBOARD_EC_S5_WAKE_EVENTS | EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE)) + +#define MAINBOARD_EC_S0IX_WAKE_EVENTS (MAINBOARD_EC_S3_WAKE_EVENTS) + +/* Log EC wake events plus EC shutdown events */ +#define MAINBOARD_EC_LOG_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_SHUTDOWN) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC)) + +/* + * ACPI related definitions for ASL code. + */ + +/* Set GPI for SCI */ +#define EC_SCI_GPI GEVENT_24 /* eSPI system event -> GPE 24 */ + +#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */ +#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */ + +/* Enable EC sync interrupt */ +#define EC_ENABLE_SYNC_IRQ_GPIO + +/* EC sync irq */ +#define EC_SYNC_IRQ GPIO_84 + +/* Enable EC backed PD MCU device in ACPI */ +#define EC_ENABLE_PD_MCU_DEVICE + +#endif /* __MAINBOARD_EC_H__ */ diff --git a/src/mainboard/google/mancomb/variants/mancomb/include/variant/ec.h b/src/mainboard/google/mancomb/variants/mancomb/include/variant/ec.h new file mode 100644 index 0000000000..9e61a440cf --- /dev/null +++ b/src/mainboard/google/mancomb/variants/mancomb/include/variant/ec.h @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/ec.h> |