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-rw-r--r--src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb10
1 files changed, 0 insertions, 10 deletions
diff --git a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb
index 3f7762120e..aa9db2a7c4 100644
--- a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb
+++ b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb
@@ -33,16 +33,6 @@ chip soc/intel/tigerlake
register "PchPmSlpSusMinAssert" = "3" # 500ms
register "PchPmSlpAMinAssert" = "3" # 2s
- # PM Util
- # GPE configuration
- # Note that GPE events called out in ASL code rely on this
- # route. i.e. If this route changes then the affected GPE
- # offset bits also need to be changed.
- # sudo devmem2 0xfe001920 (pmc_bar + GPIO_GPE_CFG)
- register "pmc_gpe0_dw0" = "GPP_B"
- register "pmc_gpe0_dw1" = "GPP_C"
- register "pmc_gpe0_dw2" = "GPP_E"
-
# Enable the correct decode ranges on the LPC bus.
register "lpc_ioe" = "LPC_IOE_EC_4E_4F |
LPC_IOE_SUPERIO_2E_2F |