diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_smbus.c | 3 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/early_smbus.c | 3 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/early_smbus.c | 3 |
3 files changed, 6 insertions, 3 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_smbus.c b/src/southbridge/intel/bd82x6x/early_smbus.c index f3151af200..0275078129 100644 --- a/src/southbridge/intel/bd82x6x/early_smbus.c +++ b/src/southbridge/intel/bd82x6x/early_smbus.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ +#include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <device/smbus_host.h> @@ -17,7 +18,7 @@ int smbus_enable_iobar(uintptr_t base) pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3); /* Check to make sure we've got the right device. */ - if (pci_read_config16(dev, 0x0) != 0x8086) + if (pci_read_config16(dev, PCI_VENDOR_ID) != PCI_VENDOR_ID_INTEL) return -1; /* Set SMBus I/O base. */ diff --git a/src/southbridge/intel/ibexpeak/early_smbus.c b/src/southbridge/intel/ibexpeak/early_smbus.c index 0c99a2245f..b87c872012 100644 --- a/src/southbridge/intel/ibexpeak/early_smbus.c +++ b/src/southbridge/intel/ibexpeak/early_smbus.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ +#include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <device/smbus_host.h> @@ -17,7 +18,7 @@ int smbus_enable_iobar(uintptr_t base) pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3); /* Check to make sure we've got the right device. */ - if (pci_read_config16(dev, 0x0) != 0x8086) + if (pci_read_config16(dev, PCI_VENDOR_ID) != PCI_VENDOR_ID_INTEL) return -1; /* Set SMBus I/O base. */ diff --git a/src/southbridge/intel/lynxpoint/early_smbus.c b/src/southbridge/intel/lynxpoint/early_smbus.c index f3151af200..0275078129 100644 --- a/src/southbridge/intel/lynxpoint/early_smbus.c +++ b/src/southbridge/intel/lynxpoint/early_smbus.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ +#include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <device/smbus_host.h> @@ -17,7 +18,7 @@ int smbus_enable_iobar(uintptr_t base) pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3); /* Check to make sure we've got the right device. */ - if (pci_read_config16(dev, 0x0) != 0x8086) + if (pci_read_config16(dev, PCI_VENDOR_ID) != PCI_VENDOR_ID_INTEL) return -1; /* Set SMBus I/O base. */ |