aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/variants/anahera/overridetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/anahera4es/overridetree.cb2
2 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb
index 0db917ef40..9934dee8e3 100644
--- a/src/mainboard/google/brya/variants/anahera/overridetree.cb
+++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb
@@ -73,6 +73,7 @@ chip soc/intel/alderlake
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Smart Card
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
+ register "tcss_ports[1]" = "TCSS_PORT_EMPTY"
device domain 0 on
device ref igpu on
chip drivers/gfx/generic
@@ -139,6 +140,7 @@ chip soc/intel/alderlake
device generic 0 on end
end
end
+ device ref tbt_pcie_rp1 off end
device ref cnvi_wifi on
chip drivers/wifi/generic
register "wake" = "GPE0_PME_B0"
diff --git a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb
index 61365650dc..0d36ddf6c8 100644
--- a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb
@@ -65,6 +65,7 @@ chip soc/intel/alderlake
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Smart Card
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
+ register "tcss_ports[1]" = "TCSS_PORT_EMPTY"
device domain 0 on
device ref igpu on
chip drivers/gfx/generic
@@ -131,6 +132,7 @@ chip soc/intel/alderlake
device generic 0 on end
end
end
+ device ref tbt_pcie_rp1 off end
device ref cnvi_wifi on
chip drivers/wifi/generic
register "wake" = "GPE0_PME_B0"