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-rw-r--r--src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
index 9f868406a1..58c1719b48 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
+++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
@@ -45,6 +45,9 @@ chip soc/intel/meteorlake
# DPTF enable
register "dptf_enable" = "1"
+ # Setting TCC of 100C = Tj max (110) - TCC_Offset (10)
+ register "tcc_offset" = "10"
+
# Enable CNVi BT
register "cnvi_bt_core" = "true"