diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/drivers/intel/gma/opregion.h | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/fsp_sandybridge/gma.c | 15 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/gma.c | 15 | ||||
| -rw-r--r-- | src/northbridge/intel/nehalem/gma.c | 15 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/gma.c | 15 |
5 files changed, 58 insertions, 4 deletions
diff --git a/src/drivers/intel/gma/opregion.h b/src/drivers/intel/gma/opregion.h index e3866933cd..09fa24180b 100644 --- a/src/drivers/intel/gma/opregion.h +++ b/src/drivers/intel/gma/opregion.h @@ -246,5 +246,7 @@ typedef struct { } __attribute__((packed)) optionrom_vbt_t; void intel_gma_opregion_register(uintptr_t opregion); +uintptr_t gma_get_gnvs_aslb(const void *gnvs); +void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb); #endif /* _COMMON_GMA_H_ */ diff --git a/src/northbridge/intel/fsp_sandybridge/gma.c b/src/northbridge/intel/fsp_sandybridge/gma.c index 8e2d968cb3..224b674094 100644 --- a/src/northbridge/intel/fsp_sandybridge/gma.c +++ b/src/northbridge/intel/fsp_sandybridge/gma.c @@ -53,6 +53,19 @@ u32 map_oprom_vendev(u32 vendev) return new_vendev; } +uintptr_t gma_get_gnvs_aslb(const void *gnvs) +{ + const global_nvs_t *gnvs_ptr = gnvs; + return (uintptr_t)(gnvs_ptr ? gnvs_ptr->aslb : 0); +} + +void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb) +{ + global_nvs_t *gnvs_ptr = gnvs; + if (gnvs_ptr) + gnvs_ptr->aslb = aslb; +} + static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device) { if (!vendor || !device) { @@ -121,7 +134,7 @@ gma_write_acpi_tables(struct device *const dev, gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); if (gnvs) { /* IGD OpRegion Base Address */ - gnvs->aslb = (u32)(uintptr_t)opregion; + gma_set_gnvs_aslb(gnvs, (uintptr_t)opregion); } else { printk(BIOS_ERR, "Error: GNVS table not found.\n"); } diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 75f3b7a944..6cd1f6f1d7 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -215,6 +215,19 @@ int gtt_poll(u32 reg, u32 mask, u32 value) return 0; } +uintptr_t gma_get_gnvs_aslb(const void *gnvs) +{ + const global_nvs_t *gnvs_ptr = gnvs; + return (uintptr_t)(gnvs_ptr ? gnvs_ptr->aslb : 0); +} + +void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb) +{ + global_nvs_t *gnvs_ptr = gnvs; + if (gnvs_ptr) + gnvs_ptr->aslb = aslb; +} + static void power_well_enable(void) { gtt_write(HSW_PWR_WELL_CTL1, HSW_PWR_WELL_ENABLE); @@ -527,7 +540,7 @@ gma_write_acpi_tables(struct device *const dev, gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); if (gnvs) { /* IGD OpRegion Base Address */ - gnvs->aslb = (u32)(uintptr_t)opregion; + gma_set_gnvs_aslb(gnvs, (uintptr_t)opregion); } else { printk(BIOS_ERR, "Error: GNVS table not found.\n"); } diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c index fa84f784e4..7489fd4ed2 100644 --- a/src/northbridge/intel/nehalem/gma.c +++ b/src/northbridge/intel/nehalem/gma.c @@ -304,6 +304,19 @@ int gtt_poll(u32 reg, u32 mask, u32 value) return 0; } +uintptr_t gma_get_gnvs_aslb(const void *gnvs) +{ + const global_nvs_t *gnvs_ptr = gnvs; + return (uintptr_t)(gnvs_ptr ? gnvs_ptr->aslb : 0); +} + +void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb) +{ + global_nvs_t *gnvs_ptr = gnvs; + if (gnvs_ptr) + gnvs_ptr->aslb = aslb; +} + static void gma_pm_init_pre_vbios(struct device *dev) { u32 reg32; @@ -1136,7 +1149,7 @@ gma_write_acpi_tables(struct device *const dev, gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); if (gnvs) { /* IGD OpRegion Base Address */ - gnvs->aslb = (u32)(uintptr_t)opregion; + gma_set_gnvs_aslb(gnvs, (uintptr_t)opregion); } else { printk(BIOS_ERR, "Error: GNVS table not found.\n"); } diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c index 9611e64797..9de3895cab 100644 --- a/src/northbridge/intel/sandybridge/gma.c +++ b/src/northbridge/intel/sandybridge/gma.c @@ -311,6 +311,19 @@ int gtt_poll(u32 reg, u32 mask, u32 value) return 0; } +uintptr_t gma_get_gnvs_aslb(const void *gnvs) +{ + const global_nvs_t *gnvs_ptr = gnvs; + return (uintptr_t)(gnvs_ptr ? gnvs_ptr->aslb : 0); +} + +void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb) +{ + global_nvs_t *gnvs_ptr = gnvs; + if (gnvs_ptr) + gnvs_ptr->aslb = aslb; +} + static void gma_pm_init_pre_vbios(struct device *dev) { u32 reg32; @@ -689,7 +702,7 @@ gma_write_acpi_tables(struct device *const dev, gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); if (gnvs) { /* IGD OpRegion Base Address */ - gnvs->aslb = (u32)(uintptr_t)opregion; + gma_set_gnvs_aslb(gnvs, (uintptr_t)opregion); } else { printk(BIOS_ERR, "Error: GNVS table not found.\n"); } |