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-rw-r--r--src/mainboard/google/asurada/mainboard.c70
-rw-r--r--src/mainboard/google/cherry/mainboard.c104
-rw-r--r--src/soc/mediatek/mt8192/Makefile.inc2
-rw-r--r--src/soc/mediatek/mt8192/msdc.c90
-rw-r--r--src/soc/mediatek/mt8195/Makefile.inc2
-rw-r--r--src/soc/mediatek/mt8195/msdc.c108
6 files changed, 204 insertions, 172 deletions
diff --git a/src/mainboard/google/asurada/mainboard.c b/src/mainboard/google/asurada/mainboard.c
index 7704899f16..bbca4b83ba 100644
--- a/src/mainboard/google/asurada/mainboard.c
+++ b/src/mainboard/google/asurada/mainboard.c
@@ -142,72 +142,6 @@ static bool configure_display(void)
return true;
}
-static void configure_emmc(void)
-{
- void *gpio_base = (void *)IOCFG_TL_BASE;
- int i;
-
- const gpio_t emmc_pu_pin[] = {
- GPIO(MSDC0_DAT0), GPIO(MSDC0_DAT1),
- GPIO(MSDC0_DAT2), GPIO(MSDC0_DAT3),
- GPIO(MSDC0_DAT4), GPIO(MSDC0_DAT5),
- GPIO(MSDC0_DAT6), GPIO(MSDC0_DAT7),
- GPIO(MSDC0_CMD), GPIO(MSDC0_RSTB),
- };
-
- const gpio_t emmc_pd_pin[] = {
- GPIO(MSDC0_DSL), GPIO(MSDC0_CLK),
- };
-
- for (i = 0; i < ARRAY_SIZE(emmc_pu_pin); i++)
- gpio_set_pull(emmc_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP);
-
- for (i = 0; i < ARRAY_SIZE(emmc_pd_pin); i++)
- gpio_set_pull(emmc_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN);
-
- /* set eMMC cmd/dat/clk/ds/rstb pins driving to 10mA */
- clrsetbits32(gpio_base, MSDC0_DRV_MASK, MSDC0_DRV_VALUE);
-
- mtk_emmc_early_init((void *)MSDC0_BASE, (void *)MSDC0_TOP_BASE);
-}
-
-static void configure_sdcard(void)
-{
- void *gpio_base = (void *)IOCFG_RM_BASE;
- void *gpio_mode0_base = (void *)MSDC1_GPIO_MODE0_BASE;
- void *gpio_mode1_base = (void *)MSDC1_GPIO_MODE1_BASE;
- uint8_t enable = 1;
- int i;
-
- const gpio_t sdcard_pu_pin[] = {
- GPIO(MSDC1_DAT0), GPIO(MSDC1_DAT1),
- GPIO(MSDC1_DAT2), GPIO(MSDC1_DAT3),
- GPIO(MSDC1_CMD),
- };
-
- const gpio_t sdcard_pd_pin[] = {
- GPIO(MSDC1_CLK),
- };
-
- for (i = 0; i < ARRAY_SIZE(sdcard_pu_pin); i++)
- gpio_set_pull(sdcard_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP);
-
- for (i = 0; i < ARRAY_SIZE(sdcard_pd_pin); i++)
- gpio_set_pull(sdcard_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN);
-
- /* set sdcard cmd/dat/clk pins driving to 8mA */
- clrsetbits32(gpio_base, MSDC1_DRV_MASK, MSDC1_DRV_VALUE);
-
- /* set sdcard dat2/dat0/dat3/cmd/clk pins to msdc1 mode */
- clrsetbits32(gpio_mode0_base, MSDC1_GPIO_MODE0_MASK, MSDC1_GPIO_MODE0_VALUE);
-
- /* set sdcard dat1 pin to msdc1 mode */
- clrsetbits32(gpio_mode1_base, MSDC1_GPIO_MODE1_MASK, MSDC1_GPIO_MODE1_VALUE);
-
- mainboard_enable_regulator(MTK_REGULATOR_VCC, enable);
- mainboard_enable_regulator(MTK_REGULATOR_VCCQ, enable);
-}
-
static void configure_audio(void)
{
/* Audio PWR */
@@ -222,8 +156,8 @@ static void configure_audio(void)
static void mainboard_init(struct device *dev)
{
- configure_emmc();
- configure_sdcard();
+ mtk_msdc_configure_emmc(true);
+ mtk_msdc_configure_sdcard();
configure_audio();
setup_usb_host();
diff --git a/src/mainboard/google/cherry/mainboard.c b/src/mainboard/google/cherry/mainboard.c
index a09705019e..92d8ee1dbe 100644
--- a/src/mainboard/google/cherry/mainboard.c
+++ b/src/mainboard/google/cherry/mainboard.c
@@ -15,9 +15,7 @@
#include <soc/gpio.h>
#include <soc/i2c.h>
#include <soc/msdc.h>
-#include <soc/mt6360.h>
#include <soc/mtcmos.h>
-#include <soc/regulator.h>
#include <soc/spm.h>
#include <soc/usb.h>
@@ -31,28 +29,6 @@
#define GPIO_EDP_HPD_1V8 GPIO(GPIO_07)
#define GPIO_EN_PP3300_DISP_X GPIO(I2SO1_D2)
-DEFINE_BITFIELD(MSDC0_DRV, 29, 0)
-DEFINE_BITFIELD(MSDC1_DRV, 17, 0)
-DEFINE_BITFIELD(MSDC1_GPIO_MODE0_0, 26, 24)
-DEFINE_BITFIELD(MSDC1_GPIO_MODE0_1, 30, 28)
-DEFINE_BITFIELD(MSDC1_GPIO_MODE1_0, 2, 0)
-DEFINE_BITFIELD(MSDC1_GPIO_MODE1_1, 6, 4)
-DEFINE_BITFIELD(MSDC1_GPIO_MODE1_2, 10, 8)
-DEFINE_BITFIELD(MSDC1_GPIO_MODE1_3, 14, 12)
-
-#define MSDC0_BASE 0x11230000
-#define MSDC0_TOP_BASE 0x11f50000
-
-#define MSDC0_DRV_VALUE 0x1b6db6db
-#define MSDC1_DRV_VALUE 0x1b6db
-#define MSDC1_GPIO_MODE0_VALUE 0x1
-#define MSDC1_GPIO_MODE1_VALUE 0x1
-
-enum {
- MSDC1_GPIO_MODE0_BASE = 0x100053d0,
- MSDC1_GPIO_MODE1_BASE = 0x100053e0,
-};
-
static void register_reset_to_bl31(void)
{
static struct bl_aux_param_gpio param_reset = {
@@ -64,82 +40,6 @@ static void register_reset_to_bl31(void)
register_bl31_aux_param(&param_reset.h);
}
-static void configure_emmc(void)
-{
- void *gpio_base = (void *)IOCFG_TL_BASE;
- int i;
-
- const gpio_t emmc_pu_pin[] = {
- GPIO(EMMC_DAT0), GPIO(EMMC_DAT1),
- GPIO(EMMC_DAT2), GPIO(EMMC_DAT3),
- GPIO(EMMC_DAT4), GPIO(EMMC_DAT5),
- GPIO(EMMC_DAT6), GPIO(EMMC_DAT7),
- GPIO(EMMC_CMD), GPIO(EMMC_RSTB),
- };
-
- const gpio_t emmc_pd_pin[] = {
- GPIO(EMMC_DSL), GPIO(EMMC_CLK),
- };
-
- for (i = 0; i < ARRAY_SIZE(emmc_pu_pin); i++)
- gpio_set_pull(emmc_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP);
-
- for (i = 0; i < ARRAY_SIZE(emmc_pd_pin); i++)
- gpio_set_pull(emmc_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN);
-
- /* set eMMC cmd/dat/clk/ds/rstb pins driving to 8mA */
- SET32_BITFIELDS(gpio_base, MSDC0_DRV, MSDC0_DRV_VALUE);
-
- mtk_emmc_early_init((void *)MSDC0_BASE, (void *)MSDC0_TOP_BASE);
-}
-
-static void configure_sdcard(void)
-{
- void *gpio_base = (void *)IOCFG_RB_BASE;
- void *gpio_mode0_base = (void *)MSDC1_GPIO_MODE0_BASE;
- void *gpio_mode1_base = (void *)MSDC1_GPIO_MODE1_BASE;
- int i;
-
- const gpio_t sdcard_pu_pin[] = {
- GPIO(MSDC1_DAT0), GPIO(MSDC1_DAT1),
- GPIO(MSDC1_DAT2), GPIO(MSDC1_DAT3),
- GPIO(MSDC1_CMD),
- };
-
- const gpio_t sdcard_pd_pin[] = {
- GPIO(MSDC1_CLK),
- };
-
- for (i = 0; i < ARRAY_SIZE(sdcard_pu_pin); i++)
- gpio_set_pull(sdcard_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP);
-
- for (i = 0; i < ARRAY_SIZE(sdcard_pd_pin); i++)
- gpio_set_pull(sdcard_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN);
-
- /* set sdcard cmd/dat/clk pins driving to 8mA */
- SET32_BITFIELDS(gpio_base, MSDC1_DRV, MSDC1_DRV_VALUE);
-
- /* set sdcard dat2/dat0/dat3/cmd/clk pins to msdc1 mode */
- SET32_BITFIELDS(gpio_mode0_base,
- MSDC1_GPIO_MODE0_0, MSDC1_GPIO_MODE0_VALUE,
- MSDC1_GPIO_MODE0_1, MSDC1_GPIO_MODE0_VALUE);
-
- /* set sdcard dat1 pin to msdc1 mode */
- SET32_BITFIELDS(gpio_mode1_base,
- MSDC1_GPIO_MODE1_0, MSDC1_GPIO_MODE1_VALUE,
- MSDC1_GPIO_MODE1_1, MSDC1_GPIO_MODE1_VALUE,
- MSDC1_GPIO_MODE1_2, MSDC1_GPIO_MODE1_VALUE,
- MSDC1_GPIO_MODE1_3, MSDC1_GPIO_MODE1_VALUE);
-
- mtk_i2c_bus_init(I2C7, I2C_SPEED_FAST);
-
- if (CONFIG(BOARD_GOOGLE_CHERRY))
- mt6360_init(I2C7);
-
- mainboard_enable_regulator(MTK_REGULATOR_VCCQ, 1);
- mainboard_enable_regulator(MTK_REGULATOR_VCC, 1);
-}
-
/* Set up backlight control pins as output pin and power-off by default */
static void configure_panel_backlight(void)
{
@@ -199,8 +99,8 @@ static void mainboard_init(struct device *dev)
else
printk(BIOS_INFO, "%s: Skipped display initialization\n", __func__);
- configure_emmc();
- configure_sdcard();
+ mtk_msdc_configure_emmc(true);
+ mtk_msdc_configure_sdcard();
setup_usb_host();
/* for audio usage */
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc
index e5ca4857fc..a75ac28b08 100644
--- a/src/soc/mediatek/mt8192/Makefile.inc
+++ b/src/soc/mediatek/mt8192/Makefile.inc
@@ -56,7 +56,7 @@ ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
ramstage-y += ../common/mcu.c
ramstage-y += ../common/mcupm.c
ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
-ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c
+ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c
ramstage-y += ../common/mtcmos.c mtcmos.c
ramstage-y += ../common/pmif.c
ramstage-y += ../common/rtc.c ../common/rtc_mt6359p.c
diff --git a/src/soc/mediatek/mt8192/msdc.c b/src/soc/mediatek/mt8192/msdc.c
new file mode 100644
index 0000000000..113069a27b
--- /dev/null
+++ b/src/soc/mediatek/mt8192/msdc.c
@@ -0,0 +1,90 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/mmio.h>
+#include <soc/addressmap.h>
+#include <soc/gpio.h>
+#include <soc/regulator.h>
+#include <soc/msdc.h>
+
+#define MSDC0_BASE 0x11f60000
+#define MSDC0_TOP_BASE 0x11f50000
+
+#define MSDC0_DRV_MASK 0x3fffffff
+#define MSDC1_DRV_MASK 0x3ffff000
+#define MSDC0_DRV_VALUE 0x24924924
+#define MSDC1_DRV_VALUE 0x1b6db000
+
+#define MSDC1_GPIO_MODE0_BASE 0x10005360
+#define MSDC1_GPIO_MODE0_MASK 0x77777000
+#define MSDC1_GPIO_MODE0_VALUE 0x11111000
+
+#define MSDC1_GPIO_MODE1_BASE 0x10005370
+#define MSDC1_GPIO_MODE1_MASK 0x7
+#define MSDC1_GPIO_MODE1_VALUE 0x1
+
+void mtk_msdc_configure_emmc(bool is_early_init)
+{
+ void *gpio_base = (void *)IOCFG_TL_BASE;
+ int i;
+
+ const gpio_t emmc_pu_pin[] = {
+ GPIO(MSDC0_DAT0), GPIO(MSDC0_DAT1),
+ GPIO(MSDC0_DAT2), GPIO(MSDC0_DAT3),
+ GPIO(MSDC0_DAT4), GPIO(MSDC0_DAT5),
+ GPIO(MSDC0_DAT6), GPIO(MSDC0_DAT7),
+ GPIO(MSDC0_CMD), GPIO(MSDC0_RSTB),
+ };
+
+ const gpio_t emmc_pd_pin[] = {
+ GPIO(MSDC0_DSL), GPIO(MSDC0_CLK),
+ };
+
+ for (i = 0; i < ARRAY_SIZE(emmc_pu_pin); i++)
+ gpio_set_pull(emmc_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP);
+
+ for (i = 0; i < ARRAY_SIZE(emmc_pd_pin); i++)
+ gpio_set_pull(emmc_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN);
+
+ /* set eMMC cmd/dat/clk/ds/rstb pins driving to 10mA */
+ clrsetbits32(gpio_base, MSDC0_DRV_MASK, MSDC0_DRV_VALUE);
+
+ if (is_early_init)
+ mtk_emmc_early_init((void *)MSDC0_BASE, (void *)MSDC0_TOP_BASE);
+}
+
+void mtk_msdc_configure_sdcard(void)
+{
+ void *gpio_base = (void *)IOCFG_RM_BASE;
+ void *gpio_mode0_base = (void *)MSDC1_GPIO_MODE0_BASE;
+ void *gpio_mode1_base = (void *)MSDC1_GPIO_MODE1_BASE;
+ uint8_t enable = 1;
+ int i;
+
+ const gpio_t sdcard_pu_pin[] = {
+ GPIO(MSDC1_DAT0), GPIO(MSDC1_DAT1),
+ GPIO(MSDC1_DAT2), GPIO(MSDC1_DAT3),
+ GPIO(MSDC1_CMD),
+ };
+
+ const gpio_t sdcard_pd_pin[] = {
+ GPIO(MSDC1_CLK),
+ };
+
+ for (i = 0; i < ARRAY_SIZE(sdcard_pu_pin); i++)
+ gpio_set_pull(sdcard_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP);
+
+ for (i = 0; i < ARRAY_SIZE(sdcard_pd_pin); i++)
+ gpio_set_pull(sdcard_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN);
+
+ /* set sdcard cmd/dat/clk pins driving to 8mA */
+ clrsetbits32(gpio_base, MSDC1_DRV_MASK, MSDC1_DRV_VALUE);
+
+ /* set sdcard dat2/dat0/dat3/cmd/clk pins to msdc1 mode */
+ clrsetbits32(gpio_mode0_base, MSDC1_GPIO_MODE0_MASK, MSDC1_GPIO_MODE0_VALUE);
+
+ /* set sdcard dat1 pin to msdc1 mode */
+ clrsetbits32(gpio_mode1_base, MSDC1_GPIO_MODE1_MASK, MSDC1_GPIO_MODE1_VALUE);
+
+ mainboard_enable_regulator(MTK_REGULATOR_VCC, enable);
+ mainboard_enable_regulator(MTK_REGULATOR_VCCQ, enable);
+}
diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc
index b22acf90a7..c6f4226ae3 100644
--- a/src/soc/mediatek/mt8195/Makefile.inc
+++ b/src/soc/mediatek/mt8195/Makefile.inc
@@ -68,7 +68,7 @@ ramstage-y += ../common/mcupm.c
ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
ramstage-y += mt6360.c
ramstage-y += ../common/mtcmos.c mtcmos.c
-ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c
+ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c
ramstage-y += ../common/pll.c pll.c
ramstage-y += ../common/pmif.c
ramstage-y += ../common/rtc.c ../common/rtc_mt6359p.c
diff --git a/src/soc/mediatek/mt8195/msdc.c b/src/soc/mediatek/mt8195/msdc.c
new file mode 100644
index 0000000000..bbfeaa6c81
--- /dev/null
+++ b/src/soc/mediatek/mt8195/msdc.c
@@ -0,0 +1,108 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/mmio.h>
+#include <soc/addressmap.h>
+#include <soc/gpio.h>
+#include <soc/i2c.h>
+#include <soc/regulator.h>
+#include <soc/msdc.h>
+#include <soc/mt6360.h>
+
+DEFINE_BITFIELD(MSDC0_DRV, 29, 0)
+DEFINE_BITFIELD(MSDC1_DRV, 17, 0)
+DEFINE_BITFIELD(MSDC1_GPIO_MODE0_0, 26, 24)
+DEFINE_BITFIELD(MSDC1_GPIO_MODE0_1, 30, 28)
+DEFINE_BITFIELD(MSDC1_GPIO_MODE1_0, 2, 0)
+DEFINE_BITFIELD(MSDC1_GPIO_MODE1_1, 6, 4)
+DEFINE_BITFIELD(MSDC1_GPIO_MODE1_2, 10, 8)
+DEFINE_BITFIELD(MSDC1_GPIO_MODE1_3, 14, 12)
+
+#define MSDC0_BASE 0x11230000
+#define MSDC0_TOP_BASE 0x11f50000
+
+#define MSDC0_DRV_VALUE 0x1b6db6db
+#define MSDC1_DRV_VALUE 0x1b6db
+#define MSDC1_GPIO_MODE0_VALUE 0x1
+#define MSDC1_GPIO_MODE1_VALUE 0x1
+
+enum {
+ MSDC1_GPIO_MODE0_BASE = 0x100053d0,
+ MSDC1_GPIO_MODE1_BASE = 0x100053e0,
+};
+
+void mtk_msdc_configure_emmc(bool is_early_init)
+{
+ void *gpio_base = (void *)IOCFG_TL_BASE;
+ int i;
+
+ const gpio_t emmc_pu_pin[] = {
+ GPIO(EMMC_DAT0), GPIO(EMMC_DAT1),
+ GPIO(EMMC_DAT2), GPIO(EMMC_DAT3),
+ GPIO(EMMC_DAT4), GPIO(EMMC_DAT5),
+ GPIO(EMMC_DAT6), GPIO(EMMC_DAT7),
+ GPIO(EMMC_CMD), GPIO(EMMC_RSTB),
+ };
+
+ const gpio_t emmc_pd_pin[] = {
+ GPIO(EMMC_DSL), GPIO(EMMC_CLK),
+ };
+
+ for (i = 0; i < ARRAY_SIZE(emmc_pu_pin); i++)
+ gpio_set_pull(emmc_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP);
+
+ for (i = 0; i < ARRAY_SIZE(emmc_pd_pin); i++)
+ gpio_set_pull(emmc_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN);
+
+ /* set eMMC cmd/dat/clk/ds/rstb pins driving to 8mA */
+ SET32_BITFIELDS(gpio_base, MSDC0_DRV, MSDC0_DRV_VALUE);
+
+ if (is_early_init)
+ mtk_emmc_early_init((void *)MSDC0_BASE, (void *)MSDC0_TOP_BASE);
+}
+
+void mtk_msdc_configure_sdcard(void)
+{
+ void *gpio_base = (void *)IOCFG_RB_BASE;
+ void *gpio_mode0_base = (void *)MSDC1_GPIO_MODE0_BASE;
+ void *gpio_mode1_base = (void *)MSDC1_GPIO_MODE1_BASE;
+ int i;
+
+ const gpio_t sdcard_pu_pin[] = {
+ GPIO(MSDC1_DAT0), GPIO(MSDC1_DAT1),
+ GPIO(MSDC1_DAT2), GPIO(MSDC1_DAT3),
+ GPIO(MSDC1_CMD),
+ };
+
+ const gpio_t sdcard_pd_pin[] = {
+ GPIO(MSDC1_CLK),
+ };
+
+ for (i = 0; i < ARRAY_SIZE(sdcard_pu_pin); i++)
+ gpio_set_pull(sdcard_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP);
+
+ for (i = 0; i < ARRAY_SIZE(sdcard_pd_pin); i++)
+ gpio_set_pull(sdcard_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN);
+
+ /* set sdcard cmd/dat/clk pins driving to 8mA */
+ SET32_BITFIELDS(gpio_base, MSDC1_DRV, MSDC1_DRV_VALUE);
+
+ /* set sdcard dat2/dat0/dat3/cmd/clk pins to msdc1 mode */
+ SET32_BITFIELDS(gpio_mode0_base,
+ MSDC1_GPIO_MODE0_0, MSDC1_GPIO_MODE0_VALUE,
+ MSDC1_GPIO_MODE0_1, MSDC1_GPIO_MODE0_VALUE);
+
+ /* set sdcard dat1 pin to msdc1 mode */
+ SET32_BITFIELDS(gpio_mode1_base,
+ MSDC1_GPIO_MODE1_0, MSDC1_GPIO_MODE1_VALUE,
+ MSDC1_GPIO_MODE1_1, MSDC1_GPIO_MODE1_VALUE,
+ MSDC1_GPIO_MODE1_2, MSDC1_GPIO_MODE1_VALUE,
+ MSDC1_GPIO_MODE1_3, MSDC1_GPIO_MODE1_VALUE);
+
+ mtk_i2c_bus_init(I2C7, I2C_SPEED_FAST);
+
+ if (CONFIG(BOARD_GOOGLE_CHERRY))
+ mt6360_init(I2C7);
+
+ mainboard_enable_regulator(MTK_REGULATOR_VCCQ, 1);
+ mainboard_enable_regulator(MTK_REGULATOR_VCC, 1);
+}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 14:35:51 +0000