diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/arm64/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/arch/arm64/armv8/bootblock.S | 62 | ||||
| -rw-r--r-- | src/arch/arm64/bootblock.ld | 8 | ||||
| -rw-r--r-- | src/arch/arm64/include/arch/stages.h | 2 | ||||
| -rw-r--r-- | src/arch/arm64/ramstage.ld | 7 | ||||
| -rw-r--r-- | src/arch/arm64/romstage.ld | 6 | ||||
| -rw-r--r-- | src/arch/arm64/stage_entry.S | 57 | ||||
| -rw-r--r-- | src/arch/arm64/stages.c | 5 |
8 files changed, 74 insertions, 74 deletions
diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc index a080e23787..5f778b2b23 100644 --- a/src/arch/arm64/Makefile.inc +++ b/src/arch/arm64/Makefile.inc @@ -109,6 +109,7 @@ ramstage-y += tables.c ramstage-y += memset.S ramstage-y += memcpy.S ramstage-y += memmove.S +ramstage-y += stage_entry.S ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) diff --git a/src/arch/arm64/armv8/bootblock.S b/src/arch/arm64/armv8/bootblock.S index e65515f20b..ef7064580f 100644 --- a/src/arch/arm64/armv8/bootblock.S +++ b/src/arch/arm64/armv8/bootblock.S @@ -19,68 +19,6 @@ * MA 02111-1307 USA */ -.section ".start", "a", %progbits -.globl _start -_start: b reset - .balignl 16,0xdeadbeef - -_cbfs_master_header: - /* The CBFS master header is inserted by cbfstool at the first - * aligned offset after the above anchor string is found. - * Hence, we leave some space for it. - * Assumes 64-byte alignment. - */ - .skip 128 - -reset: - /* - * Set the cpu to SVC32 mode and unmask aborts. Aborts might happen - * before logging is turned on and may crash the machine, but at least - * the problem will show up near the code that causes it. - */ - /* FIXME: Not using supervisor mode, does it apply for aarch64? */ - - msr daifclr, #0xc /* Unmask Debug and System exceptions */ - msr daifset, #0x3 /* Mask IRQ, FIQ */ - - bl arm_init_caches - - /* - * Initialize the stack to a known value. This is used to check for - * stack overflow later in the boot process. - */ - ldr x0, .Stack - ldr x1, .Stack_size - sub x0, x0, x1 - ldr x1, .Stack - ldr x2, =0xdeadbeefdeadbeef -init_stack_loop: - str x2, [x0] - add x0, x0, #8 - cmp x0, x1 - bne init_stack_loop - -/* Set stackpointer in internal RAM to call bootblock main() */ -call_bootblock: - ldr x0, .Stack /* Set up stack pointer */ - mov sp, x0 - ldr x0, =0x00000000 - - sub sp, sp, #16 - - /* - * Switch to EL2 already because Linux requires to be - * in EL1 or EL2, see its "Booting AArch64 Linux" doc - */ - bl switch_el3_to_el2 - bl main - -.align 3 -.Stack: - .word CONFIG_STACK_TOP -.align 3 -.Stack_size: - .word CONFIG_STACK_SIZE .section ".id", "a", %progbits .globl __id_start diff --git a/src/arch/arm64/bootblock.ld b/src/arch/arm64/bootblock.ld index 907d009b7d..775111bfd0 100644 --- a/src/arch/arm64/bootblock.ld +++ b/src/arch/arm64/bootblock.ld @@ -28,14 +28,14 @@ PHDRS to_load PT_LOAD; } -ENTRY(_start) +ENTRY(stage_entry) TARGET(binary) SECTIONS { . = CONFIG_BOOTBLOCK_BASE; .bootblock . : { - *(.text._start); + *(.text.stage_entry); KEEP(*(.id)); *(.text); *(.text.*); @@ -49,6 +49,10 @@ SECTIONS *(.sbss.*); } : to_load = 0xff + /* arm64 chipsets need to define CONFIG_BOOTBLOCK_STACK_(TOP|BOTTOM) */ + _stack = CONFIG_BOOTBLOCK_STACK_BOTTOM; + _estack = CONFIG_BOOTBLOCK_STACK_TOP; + preram_cbmem_console = CONFIG_CONSOLE_PRERAM_BUFFER_BASE; /DISCARD/ : { diff --git a/src/arch/arm64/include/arch/stages.h b/src/arch/arm64/include/arch/stages.h index e7a240102c..0f82450495 100644 --- a/src/arch/arm64/include/arch/stages.h +++ b/src/arch/arm64/include/arch/stages.h @@ -22,7 +22,7 @@ extern void main(void); -void stage_entry(void) __attribute__((section(".text.stage_entry.aarch64"))); +void stage_entry(void); void stage_exit(void *); void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size); diff --git a/src/arch/arm64/ramstage.ld b/src/arch/arm64/ramstage.ld index 5dc55bae52..19c9309bcb 100644 --- a/src/arch/arm64/ramstage.ld +++ b/src/arch/arm64/ramstage.ld @@ -39,7 +39,7 @@ SECTIONS .text : { _text = .; _start = .; - *(.text.stage_entry.aarch64); + *(.text.stage_entry); *(.text); *(.text.*); . = ALIGN(16); @@ -116,8 +116,9 @@ SECTIONS } _eheap = .; - _stack = CONFIG_STACK_BOTTOM; - _estack = CONFIG_STACK_TOP; + /* arm64 chipsets need to define CONFIG_RAMSTAGE_STACK_(TOP|BOTTOM) */ + _stack = CONFIG_RAMSTAGE_STACK_BOTTOM; + _estack = CONFIG_RAMSTAGE_STACK_TOP; /* The ram segment. This includes all memory used by the memory * resident copy of coreboot, except the tables that are produced on diff --git a/src/arch/arm64/romstage.ld b/src/arch/arm64/romstage.ld index a8d092c2f5..9e08464a33 100644 --- a/src/arch/arm64/romstage.ld +++ b/src/arch/arm64/romstage.ld @@ -42,7 +42,7 @@ SECTIONS .romtext . : { _start = .; - *(.text.stage_entry.aarch64); + *(.text.stage_entry); *(.text.startup); *(.text); *(.text.*); @@ -76,6 +76,10 @@ SECTIONS _end = .; + /* arm64 chipsets need to define CONFIG_ROMSTAGE_STACK_(TOP|BOTTOM) */ + _stack = CONFIG_ROMSTAGE_STACK_BOTTOM; + _estack = CONFIG_ROMSTAGE_STACK_TOP; + preram_cbmem_console = CONFIG_CONSOLE_PRERAM_BUFFER_BASE; /* Discard the sections we don't need/want */ diff --git a/src/arch/arm64/stage_entry.S b/src/arch/arm64/stage_entry.S new file mode 100644 index 0000000000..56eca77aae --- /dev/null +++ b/src/arch/arm64/stage_entry.S @@ -0,0 +1,57 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + + +#include <arch/asm.h> + +ENTRY(arm64_el3_startup) + mov x0, xzr + msr SCTLR_EL3, x0 + msr SCR_EL3, x0 + /* Have stack pointer use SP_EL0. */ + msr SPSel, #0 + isb + + /* Load up the stack if non-zero. */ + ldr x0, .stack + cmp x0, #0 + b.eq 1f + mov sp, x0 + 1: + + ldr x1, .entry + br x1 + + .align 4 + /* + * By default branch to main() and initialize the stack according + * to the Kconfig option for cpu0. However, this code can be relocated + * and reused to start up secondary cpus. + */ + .stack: + .quad _estack + .entry: + .quad main +ENDPROC(arm64_el3_startup) +.global arm64_el3_startup_end +arm64_el3_startup_end: + +ENTRY(stage_entry) + b arm64_el3_startup +ENDPROC(stage_entry) diff --git a/src/arch/arm64/stages.c b/src/arch/arm64/stages.c index e1ab21aadf..8316b221fe 100644 --- a/src/arch/arm64/stages.c +++ b/src/arch/arm64/stages.c @@ -31,11 +31,6 @@ #include <arch/stages.h> #include <arch/cache.h> -void stage_entry(void) -{ - main(); -} - /* we had marked 'doit' as 'noreturn'. * There is no apparent harm in leaving it as something we can return from, and in the one * case where we call a payload, the payload is allowed to return. |