diff options
Diffstat (limited to 'src')
39 files changed, 79 insertions, 68 deletions
diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc index e28d033837..349ec05f03 100644 --- a/src/cpu/intel/car/cache_as_ram.inc +++ b/src/cpu/intel/car/cache_as_ram.inc @@ -318,7 +318,12 @@ lout: /* We need to set EBP? No need. */ movl %esp, %ebp pushl %eax /* BIST */ - call main + call romstage_main + + /* Save return value from romstage_main. It contains the stack to use + * after cache-as-ram is torn down. It also contains the information + * for setting up MTRRs. */ + movl %eax, %ebx /* We don't need CAR from now on. */ @@ -356,7 +361,8 @@ __main: post_code(POST_PREPARE_RAMSTAGE) cld /* Clear direction flag. */ - movl $CONFIG_RAMTOP, %esp + /* Setup stack as indicated by return value from romstage_main(). */ + movl %ebx, %esp movl %esp, %ebp call copy_and_run diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc index 992000bcfd..512571d318 100644 --- a/src/cpu/intel/slot_1/Makefile.inc +++ b/src/cpu/intel/slot_1/Makefile.inc @@ -29,3 +29,4 @@ subdirs-y += ../../x86/smm subdirs-y += ../microcode cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc +romstage-y += ../car/romstage.c diff --git a/src/cpu/intel/socket_FC_PGA370/Makefile.inc b/src/cpu/intel/socket_FC_PGA370/Makefile.inc index fb9accc3fa..cc6e299551 100644 --- a/src/cpu/intel/socket_FC_PGA370/Makefile.inc +++ b/src/cpu/intel/socket_FC_PGA370/Makefile.inc @@ -23,3 +23,4 @@ subdirs-y += ../../x86/smm subdirs-y += ../microcode cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc +romstage-y += ../car/romstage.c diff --git a/src/cpu/intel/socket_PGA370/Makefile.inc b/src/cpu/intel/socket_PGA370/Makefile.inc index 2aed7de24c..d0f54051d6 100644 --- a/src/cpu/intel/socket_PGA370/Makefile.inc +++ b/src/cpu/intel/socket_PGA370/Makefile.inc @@ -23,3 +23,4 @@ subdirs-y += ../../x86/smm subdirs-y += ../microcode cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc +romstage-y += ../car/romstage.c diff --git a/src/cpu/intel/socket_mFCBGA479/Makefile.inc b/src/cpu/intel/socket_mFCBGA479/Makefile.inc index e247c0966d..c84659807a 100644 --- a/src/cpu/intel/socket_mFCBGA479/Makefile.inc +++ b/src/cpu/intel/socket_mFCBGA479/Makefile.inc @@ -7,3 +7,4 @@ subdirs-y += ../../x86/smm subdirs-y += ../microcode cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc +romstage-y += ../car/romstage.c diff --git a/src/cpu/intel/socket_mPGA479M/Makefile.inc b/src/cpu/intel/socket_mPGA479M/Makefile.inc index abade4e87e..2a3187a8c0 100644 --- a/src/cpu/intel/socket_mPGA479M/Makefile.inc +++ b/src/cpu/intel/socket_mPGA479M/Makefile.inc @@ -10,3 +10,4 @@ subdirs-y += ../microcode subdirs-y += ../hyperthreading cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc +romstage-y += ../car/romstage.c diff --git a/src/mainboard/a-trend/atc-6220/romstage.c b/src/mainboard/a-trend/atc-6220/romstage.c index f075b4e564..09e01835cb 100644 --- a/src/mainboard/a-trend/atc-6220/romstage.c +++ b/src/mainboard/a-trend/atc-6220/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83977tf/w83977tf.h> @@ -36,8 +37,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/a-trend/atc-6240/romstage.c b/src/mainboard/a-trend/atc-6240/romstage.c index 8c73824235..11ce41b9b5 100644 --- a/src/mainboard/a-trend/atc-6240/romstage.c +++ b/src/mainboard/a-trend/atc-6240/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include <lib.h> @@ -35,8 +36,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/abit/be6-ii_v2_0/romstage.c b/src/mainboard/abit/be6-ii_v2_0/romstage.c index e38d846a6f..fb470b2ecb 100644 --- a/src/mainboard/abit/be6-ii_v2_0/romstage.c +++ b/src/mainboard/abit/be6-ii_v2_0/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/winbond/common/winbond.h> /* FIXME: It's a Winbond W83977EF, actually. */ #include <superio/winbond/w83977tf/w83977tf.h> @@ -37,8 +38,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/asus/mew-am/romstage.c b/src/mainboard/asus/mew-am/romstage.c index ec9091ec02..c39657b4e0 100644 --- a/src/mainboard/asus/mew-am/romstage.c +++ b/src/mainboard/asus/mew-am/romstage.c @@ -23,13 +23,13 @@ #include <southbridge/intel/i82801ax/i82801ax.h> #include <northbridge/intel/i82810/raminit.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/smsc/smscsuperio/smscsuperio.h> #include <lib.h> #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/asus/mew-vm/romstage.c b/src/mainboard/asus/mew-vm/romstage.c index f52413ca39..947003992a 100644 --- a/src/mainboard/asus/mew-vm/romstage.c +++ b/src/mainboard/asus/mew-vm/romstage.c @@ -23,13 +23,13 @@ #include <superio/smsc/lpc47b272/lpc47b272.h> #include <northbridge/intel/i82810/raminit.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <southbridge/intel/i82801ax/i82801ax.h> #include <lib.h> #define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1) -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/asus/p2b-d/romstage.c b/src/mainboard/asus/p2b-d/romstage.c index b46646d494..ea0c2299e4 100644 --- a/src/mainboard/asus/p2b-d/romstage.c +++ b/src/mainboard/asus/p2b-d/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83977tf/w83977tf.h> #include <lib.h> @@ -35,8 +36,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/asus/p2b-ds/romstage.c b/src/mainboard/asus/p2b-ds/romstage.c index 4464f29449..694f03e15a 100644 --- a/src/mainboard/asus/p2b-ds/romstage.c +++ b/src/mainboard/asus/p2b-ds/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83977tf/w83977tf.h> #include <lib.h> @@ -35,8 +36,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/asus/p2b-f/romstage.c b/src/mainboard/asus/p2b-f/romstage.c index 521ddbda5b..80fd76c225 100644 --- a/src/mainboard/asus/p2b-f/romstage.c +++ b/src/mainboard/asus/p2b-f/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/winbond/common/winbond.h> /* FIXME: The ASUS P2B-F has a Winbond W83977EF, actually. */ #include <superio/winbond/w83977tf/w83977tf.h> @@ -37,8 +38,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/asus/p2b-ls/romstage.c b/src/mainboard/asus/p2b-ls/romstage.c index 5808bb80aa..acd15f7eab 100644 --- a/src/mainboard/asus/p2b-ls/romstage.c +++ b/src/mainboard/asus/p2b-ls/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/winbond/common/winbond.h> /* FIXME: The ASUS P2B-LS has a Winbond W83977EF, actually. */ #include <superio/winbond/w83977tf/w83977tf.h> @@ -36,8 +37,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/asus/p2b/romstage.c b/src/mainboard/asus/p2b/romstage.c index f075b4e564..09e01835cb 100644 --- a/src/mainboard/asus/p2b/romstage.c +++ b/src/mainboard/asus/p2b/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83977tf/w83977tf.h> @@ -36,8 +37,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/asus/p3b-f/romstage.c b/src/mainboard/asus/p3b-f/romstage.c index 89e379531e..9d56d5be59 100644 --- a/src/mainboard/asus/p3b-f/romstage.c +++ b/src/mainboard/asus/p3b-f/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/winbond/common/winbond.h> /* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */ #include <superio/winbond/w83977tf/w83977tf.h> @@ -68,8 +69,7 @@ static void disable_spd(void) outb(0x67, PM_IO_BASE + 0x37); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/azza/pt-6ibd/romstage.c b/src/mainboard/azza/pt-6ibd/romstage.c index 8ed2fb1d1d..a9960db1be 100644 --- a/src/mainboard/azza/pt-6ibd/romstage.c +++ b/src/mainboard/azza/pt-6ibd/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/winbond/common/winbond.h> /* FIXME: It's a Winbond W83977EF, actually. */ #include <superio/winbond/w83977tf/w83977tf.h> @@ -37,8 +38,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/biostar/m6tba/romstage.c b/src/mainboard/biostar/m6tba/romstage.c index eb7ef25262..fd16006711 100644 --- a/src/mainboard/biostar/m6tba/romstage.c +++ b/src/mainboard/biostar/m6tba/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/smsc/smscsuperio/smscsuperio.h> #include <lib.h> @@ -34,8 +35,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c b/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c index bf12a34983..7a59b1bde4 100644 --- a/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c +++ b/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> /* FIXME: This should be PC97307 (but it's buggy at the moment)! */ #include <superio/nsc/pc97317/pc97317.h> #include <lib.h> @@ -36,8 +37,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { /* FIXME: Should be PC97307! */ pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/ecs/p6iwp-fe/romstage.c b/src/mainboard/ecs/p6iwp-fe/romstage.c index 3e8a0843f6..f092e1483e 100644 --- a/src/mainboard/ecs/p6iwp-fe/romstage.c +++ b/src/mainboard/ecs/p6iwp-fe/romstage.c @@ -24,6 +24,7 @@ #include <southbridge/intel/i82801ax/i82801ax.h> #include <northbridge/intel/i82810/raminit.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> #include <lib.h> @@ -31,8 +32,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1) #define CLKIN_DEV PNP_DEV(0x2e, IT8712F_GPIO) -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_24); ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/gigabyte/ga-6bxc/romstage.c b/src/mainboard/gigabyte/ga-6bxc/romstage.c index 4128d3047f..25e00c4694 100644 --- a/src/mainboard/gigabyte/ga-6bxc/romstage.c +++ b/src/mainboard/gigabyte/ga-6bxc/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/ite/it8671f/it8671f.h> #include <lib.h> @@ -34,8 +35,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/gigabyte/ga-6bxe/romstage.c b/src/mainboard/gigabyte/ga-6bxe/romstage.c index fac7416346..e49e50ca35 100644 --- a/src/mainboard/gigabyte/ga-6bxe/romstage.c +++ b/src/mainboard/gigabyte/ga-6bxe/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/ite/it8671f/it8671f.h> #include <lib.h> @@ -34,8 +35,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { it8671f_48mhz_clkin(); it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/hp/e_vectra_p2706t/romstage.c b/src/mainboard/hp/e_vectra_p2706t/romstage.c index a04542fd9e..1d3c3fd5c2 100644 --- a/src/mainboard/hp/e_vectra_p2706t/romstage.c +++ b/src/mainboard/hp/e_vectra_p2706t/romstage.c @@ -25,14 +25,14 @@ /* TODO: It's i810E actually! */ #include <northbridge/intel/i82810/raminit.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <southbridge/intel/i82801ax/i82801ax.h> #include <lib.h> /* TODO: It's a PC87364 actually! */ #define SERIAL_DEV PNP_DEV(0x2e, PC87360_SP1) -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { /* TODO: It's a PC87364 actually! */ pc87360_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/intel/d810e2cb/romstage.c b/src/mainboard/intel/d810e2cb/romstage.c index 934cb173a1..5bcee0c544 100644 --- a/src/mainboard/intel/d810e2cb/romstage.c +++ b/src/mainboard/intel/d810e2cb/romstage.c @@ -23,14 +23,14 @@ #include <southbridge/intel/i82801bx/i82801bx.h> #include <northbridge/intel/i82810/raminit.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/smsc/smscsuperio/smscsuperio.h> #include "gpio.c" #include <lib.h> #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1) -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { /* Set southbridge and Super I/O GPIOs. */ mb_gpio_init(); diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c index b7d216e394..cb3e870043 100644 --- a/src/mainboard/intel/mtarvon/romstage.c +++ b/src/mainboard/intel/mtarvon/romstage.c @@ -28,6 +28,7 @@ #include <superio/intel/i3100/i3100.h> #include "northbridge/intel/i3100/memory_initialized.c" #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <spd.h> #define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0) @@ -46,8 +47,7 @@ static inline int spd_read_byte(u16 device, u8 address) #include "arch/x86/lib/stages.c" #endif -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { msr_t msr; u16 perf; diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c index 36f54953b9..4b64210c38 100644 --- a/src/mainboard/intel/truxton/romstage.c +++ b/src/mainboard/intel/truxton/romstage.c @@ -28,6 +28,7 @@ #include <superio/intel/i3100/i3100.h> #include "lib/debug.c" // XXX #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <spd.h> #define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0 | DEVPRES_D4F0) @@ -42,8 +43,7 @@ static inline int spd_read_byte(u16 device, u8 address) #define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1) -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { static const struct mem_controller mch[] = { { diff --git a/src/mainboard/lanner/em8510/romstage.c b/src/mainboard/lanner/em8510/romstage.c index 0a8c4d7cb5..2e5a125fb9 100644 --- a/src/mainboard/lanner/em8510/romstage.c +++ b/src/mainboard/lanner/em8510/romstage.c @@ -31,6 +31,7 @@ #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627thg/w83627thg.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1) @@ -42,8 +43,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/intel/i855/raminit.c" #include "northbridge/intel/i855/reset_test.c" -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { if (bist == 0) { #if 0 diff --git a/src/mainboard/mitac/6513wu/romstage.c b/src/mainboard/mitac/6513wu/romstage.c index 2d99acad37..66989d9f20 100644 --- a/src/mainboard/mitac/6513wu/romstage.c +++ b/src/mainboard/mitac/6513wu/romstage.c @@ -24,13 +24,13 @@ #include <northbridge/intel/i82810/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/smsc/smscsuperio/smscsuperio.h> #include <lib.h> #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1) -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/msi/ms6119/romstage.c b/src/mainboard/msi/ms6119/romstage.c index 55e2eeee1c..48e62fc06f 100644 --- a/src/mainboard/msi/ms6119/romstage.c +++ b/src/mainboard/msi/ms6119/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83977tf/w83977tf.h> #include <lib.h> @@ -35,8 +36,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/msi/ms6147/romstage.c b/src/mainboard/msi/ms6147/romstage.c index 00ad38c8be..b6bb8876a5 100644 --- a/src/mainboard/msi/ms6147/romstage.c +++ b/src/mainboard/msi/ms6147/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83977tf/w83977tf.h> #include <lib.h> @@ -35,8 +36,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/msi/ms6156/romstage.c b/src/mainboard/msi/ms6156/romstage.c index 4ad2c50003..a7c02cdac4 100644 --- a/src/mainboard/msi/ms6156/romstage.c +++ b/src/mainboard/msi/ms6156/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83977tf/w83977tf.h> #include <lib.h> @@ -35,8 +36,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/msi/ms6178/romstage.c b/src/mainboard/msi/ms6178/romstage.c index aaad2ea02a..d7cbc32163 100644 --- a/src/mainboard/msi/ms6178/romstage.c +++ b/src/mainboard/msi/ms6178/romstage.c @@ -24,14 +24,14 @@ #include <superio/winbond/w83627hf/w83627hf.h> #include <northbridge/intel/i82810/raminit.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <southbridge/intel/i82801ax/i82801ax.h> #include <lib.h> #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #define DUMMY_DEV PNP_DEV(0x2e, 0) -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { w83627hf_set_clksel_48(DUMMY_DEV); winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/nec/powermate2000/romstage.c b/src/mainboard/nec/powermate2000/romstage.c index 037ad04664..6e6358023f 100644 --- a/src/mainboard/nec/powermate2000/romstage.c +++ b/src/mainboard/nec/powermate2000/romstage.c @@ -23,13 +23,13 @@ #include <superio/smsc/smscsuperio/smscsuperio.h> #include <northbridge/intel/i82810/raminit.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <southbridge/intel/i82801ax/i82801ax.h> #include <lib.h> #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/nokia/ip530/romstage.c b/src/mainboard/nokia/ip530/romstage.c index 42a5ac2b43..7ab7124557 100644 --- a/src/mainboard/nokia/ip530/romstage.c +++ b/src/mainboard/nokia/ip530/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/smsc/smscsuperio/smscsuperio.h> #include <lib.h> @@ -34,8 +35,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/rca/rm4100/romstage.c b/src/mainboard/rca/rm4100/romstage.c index 296d072e23..43c518f428 100644 --- a/src/mainboard/rca/rm4100/romstage.c +++ b/src/mainboard/rca/rm4100/romstage.c @@ -27,6 +27,7 @@ #include <southbridge/intel/i82801dx/i82801dx.h> #include "southbridge/intel/i82801dx/reset.c" #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include "spd_table.h" #include "gpio.c" #include "southbridge/intel/i82801dx/tco_timer.c" @@ -88,8 +89,7 @@ static void mb_early_setup(void) pci_write_config8(PCI_DEV(0, 0x1f, 0), ACPI_CNTL, 0x10); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { if (bist == 0) { if (memory_initialized()) diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c index 1e25602d93..360e5507c4 100644 --- a/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c +++ b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/ite/it8671f/it8671f.h> #include <lib.h> @@ -34,8 +35,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); diff --git a/src/mainboard/thomson/ip1000/romstage.c b/src/mainboard/thomson/ip1000/romstage.c index 5bb7718cad..9ad12257c3 100644 --- a/src/mainboard/thomson/ip1000/romstage.c +++ b/src/mainboard/thomson/ip1000/romstage.c @@ -27,6 +27,7 @@ #include <southbridge/intel/i82801dx/i82801dx.h> #include "southbridge/intel/i82801dx/reset.c" #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include "spd_table.h" #include "gpio.c" #include "southbridge/intel/i82801dx/tco_timer.c" @@ -86,8 +87,7 @@ static void mb_early_setup(void) pci_write_config8(PCI_DEV(0, 0x1f, 0), ACPI_CNTL, 0x10); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { if (bist == 0) { if (memory_initialized()) diff --git a/src/mainboard/tyan/s1846/romstage.c b/src/mainboard/tyan/s1846/romstage.c index 5cdc56d27c..01940ae842 100644 --- a/src/mainboard/tyan/s1846/romstage.c +++ b/src/mainboard/tyan/s1846/romstage.c @@ -24,6 +24,7 @@ #include <northbridge/intel/i440bx/raminit.h> #include <delay.h> #include <cpu/x86/bist.h> +#include <cpu/intel/romstage.h> #include <superio/nsc/pc87309/pc87309.h> #include <lib.h> @@ -34,8 +35,7 @@ int spd_read_byte(unsigned int device, unsigned int address) return smbus_read_byte(device, address); } -#include <cpu/intel/romstage.h> -void main(unsigned long bist) +void mainboard_romstage_entry(unsigned long bist) { pc87309_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); |