diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/northbridge/intel/gm45/stage_cache.c | 4 | ||||
-rw-r--r-- | src/northbridge/intel/i945/stage_cache.c | 4 | ||||
-rw-r--r-- | src/northbridge/intel/pineview/stage_cache.c | 4 | ||||
-rw-r--r-- | src/northbridge/intel/x4x/stage_cache.c | 4 |
4 files changed, 4 insertions, 12 deletions
diff --git a/src/northbridge/intel/gm45/stage_cache.c b/src/northbridge/intel/gm45/stage_cache.c index cbe4556bab..47f08c1397 100644 --- a/src/northbridge/intel/gm45/stage_cache.c +++ b/src/northbridge/intel/gm45/stage_cache.c @@ -13,11 +13,9 @@ * GNU General Public License for more details. */ -#include <cbmem.h> -#include <device/pci.h> +#include <stdint.h> #include <stage_cache.h> #include <cpu/intel/smm/gen1/smi.h> -#include "gm45.h" void stage_cache_external_region(void **base, size_t *size) { diff --git a/src/northbridge/intel/i945/stage_cache.c b/src/northbridge/intel/i945/stage_cache.c index b659796ea8..47f08c1397 100644 --- a/src/northbridge/intel/i945/stage_cache.c +++ b/src/northbridge/intel/i945/stage_cache.c @@ -13,11 +13,9 @@ * GNU General Public License for more details. */ -#include <cbmem.h> -#include <device/pci.h> +#include <stdint.h> #include <stage_cache.h> #include <cpu/intel/smm/gen1/smi.h> -#include "i945.h" void stage_cache_external_region(void **base, size_t *size) { diff --git a/src/northbridge/intel/pineview/stage_cache.c b/src/northbridge/intel/pineview/stage_cache.c index 6f949e69bd..47f08c1397 100644 --- a/src/northbridge/intel/pineview/stage_cache.c +++ b/src/northbridge/intel/pineview/stage_cache.c @@ -13,11 +13,9 @@ * GNU General Public License for more details. */ -#include <cbmem.h> -#include <device/pci.h> +#include <stdint.h> #include <stage_cache.h> #include <cpu/intel/smm/gen1/smi.h> -#include "pineview.h" void stage_cache_external_region(void **base, size_t *size) { diff --git a/src/northbridge/intel/x4x/stage_cache.c b/src/northbridge/intel/x4x/stage_cache.c index 8862c61db0..47f08c1397 100644 --- a/src/northbridge/intel/x4x/stage_cache.c +++ b/src/northbridge/intel/x4x/stage_cache.c @@ -13,11 +13,9 @@ * GNU General Public License for more details. */ -#include <cbmem.h> -#include <device/pci.h> +#include <stdint.h> #include <stage_cache.h> #include <cpu/intel/smm/gen1/smi.h> -#include "x4x.h" void stage_cache_external_region(void **base, size_t *size) { |