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-rw-r--r--src/arch/armv7/lib/cache.c33
1 files changed, 30 insertions, 3 deletions
diff --git a/src/arch/armv7/lib/cache.c b/src/arch/armv7/lib/cache.c
index de772a12b5..7bb337dd41 100644
--- a/src/arch/armv7/lib/cache.c
+++ b/src/arch/armv7/lib/cache.c
@@ -209,13 +209,40 @@ void dcache_clean_invalidate_by_mva(unsigned long addr, unsigned long len)
dcache_op_mva(addr, len, OP_DCCIMVAC);
}
-
void dcache_mmu_disable(void)
{
- uint32_t sctlr;
+ uint32_t sctlr, clidr;
+ int level;
+
+ clidr = read_clidr();
+ for (level = 0; level < 7; level++) {
+ unsigned int ctype = (clidr >> (level * 3)) & 0x7;
+ uint32_t csselr;
+
+ switch(ctype) {
+ case 0x0:
+ /* no cache */
+ break;
+ case 0x2:
+ case 0x4:
+ /* dcache only or unified cache */
+ csselr = level << 1;
+ write_csselr(csselr);
+ dcache_clean_invalidate_all();
+ break;
+ case 0x3:
+ /* separate icache and dcache */
+ csselr = level << 1;
+ write_csselr(csselr);
+ dcache_clean_invalidate_all();
+ break;
+ default:
+ /* reserved */
+ break;
+ }
+ }
sctlr = read_sctlr();
- dcache_clean_invalidate_all();
sctlr &= ~(SCTLR_C | SCTLR_M);
write_sctlr(sctlr);
}