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-rw-r--r--src/mainboard/google/reef/chromeos.c4
-rw-r--r--src/mainboard/google/reef/variants/baseboard/include/baseboard/ec.h17
-rw-r--r--src/mainboard/google/reef/variants/baseboard/include/baseboard/gpio.h29
3 files changed, 25 insertions, 25 deletions
diff --git a/src/mainboard/google/reef/chromeos.c b/src/mainboard/google/reef/chromeos.c
index ea0f68e236..7d7af9e11b 100644
--- a/src/mainboard/google/reef/chromeos.c
+++ b/src/mainboard/google/reef/chromeos.c
@@ -18,12 +18,8 @@
#include <gpio.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/gpio.h>
-#include <variant/ec.h>
#include <variant/gpio.h>
-#define GPIO_PCH_WP GPIO_75
-#define GPIO_EC_IN_RW GPIO_41
-
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
diff --git a/src/mainboard/google/reef/variants/baseboard/include/baseboard/ec.h b/src/mainboard/google/reef/variants/baseboard/include/baseboard/ec.h
index 5c8e306a64..9c8549df45 100644
--- a/src/mainboard/google/reef/variants/baseboard/include/baseboard/ec.h
+++ b/src/mainboard/google/reef/variants/baseboard/include/baseboard/ec.h
@@ -18,23 +18,6 @@
#include <ec/google/chromeec/ec_commands.h>
-/*
- * GPIO_11 for SCI is routed to GPE0_DW1 and maps to group GPIO_GPE_N_31_0
- * which is North community
- */
-#define EC_SCI_GPI GPE0_DW1_11
-
-/* EC SMI */
-#define EC_SMI_GPI GPIO_49
-
-/*
- * On lidopen/lidclose GPIO_22 from North Community gets toggled and
- * is used in _PRW to wake up device from sleep. GPIO_22 maps to
- * group GPIO_GPE_N_31_0 and the pad is configured as SCI with
- * EDGE_SINGLE and INVERT.
- */
-#define GPE_EC_WAKE GPE0_DW1_22
-
#define MAINBOARD_EC_SCI_EVENTS \
(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\
diff --git a/src/mainboard/google/reef/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/reef/variants/baseboard/include/baseboard/gpio.h
index b3581b6a82..90cca3666d 100644
--- a/src/mainboard/google/reef/variants/baseboard/include/baseboard/gpio.h
+++ b/src/mainboard/google/reef/variants/baseboard/include/baseboard/gpio.h
@@ -19,13 +19,34 @@
#include <soc/gpio.h>
/*
+ * GPIO_11 for SCI is routed to GPE0_DW1 and maps to group GPIO_GPE_N_31_0
+ * which is North community
+ */
+#define EC_SCI_GPI GPE0_DW1_11
+
+/* EC SMI */
+#define EC_SMI_GPI GPIO_49
+
+/*
+ * On lidopen/lidclose GPIO_22 from North Community gets toggled and
+ * is used in _PRW to wake up device from sleep. GPIO_22 maps to
+ * group GPIO_GPE_N_31_0 and the pad is configured as SCI with
+ * EDGE_SINGLE and INVERT.
+ */
+#define GPE_EC_WAKE GPE0_DW1_22
+
+/* Write Protect and indication if EC is in RW code. */
+#define GPIO_PCH_WP GPIO_75
+#define GPIO_EC_IN_RW GPIO_41
+
+/*
* The proto boards didn't have memory SKU pins, but the same ones can be
* utilized as post proto boards because the pins used were never connected
* or no peripheral utilized the signals on proto boards.
*/
-#define MEM_CONFIG3 GPIO_45
-#define MEM_CONFIG2 GPIO_38
-#define MEM_CONFIG1 GPIO_102
-#define MEM_CONFIG0 GPIO_101
+#define MEM_CONFIG3 GPIO_45
+#define MEM_CONFIG2 GPIO_38
+#define MEM_CONFIG1 GPIO_102
+#define MEM_CONFIG0 GPIO_101
#endif /* BASEBOARD_GPIO_H */