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-rw-r--r--src/config/Config.lb30
-rw-r--r--src/cpu/ppc/ppc4xx/Config.lb4
-rw-r--r--src/cpu/ppc/ppc4xx/chip.h4
-rwxr-xr-x[-rw-r--r--]src/cpu/ppc/ppc4xx/pci_bridge.c (renamed from src/mainboard/embeddedplanet/ep405pc/pci_bridge.c)4
-rw-r--r--src/cpu/ppc/ppc4xx/pci_domain.c74
-rw-r--r--src/lib/Config.lb4
-rw-r--r--src/mainboard/embeddedplanet/ep405pc/Config.lb19
-rw-r--r--src/mainboard/embeddedplanet/ep405pc/Options.lb4
8 files changed, 113 insertions, 30 deletions
diff --git a/src/config/Config.lb b/src/config/Config.lb
index 6a4b284f9d..4b446c3fe7 100644
--- a/src/config/Config.lb
+++ b/src/config/Config.lb
@@ -64,20 +64,20 @@ makerule linuxbios_ram.rom
action "cp $(LINUXBIOS_RAM-1) linuxbios_ram.rom"
end
-if CONFIG_USE_INIT
-makerule init.o
- depends "$(INIT-OBJECTS)"
- action "$(LD) -melf_i386 -r -o init.pre.o $(INIT-OBJECTS)"
- action "$(OBJCOPY) --rename-section .text=.init.text --rename-section .data=.init.data --rename-section .rodata=.init.rodata --rename-section .rodata.str1.1=.init.rodata.str1.1 init.pre.o init.o"
-end
-
-makerule linuxbios
- depends "crt0.o init.o linuxbios_ram.rom ldscript.ld"
- action "$(CC) -nostdlib -nostartfiles -static -o $@ -T ldscript.ld crt0.o init.o"
- action "$(CROSS_COMPILE)nm -n linuxbios | sort > linuxbios.map"
-end
-
-else
+#if CONFIG_USE_INIT
+#makerule init.o
+ #depends "$(INIT-OBJECTS)"
+ #action "$(LD) -melf_i386 -r -o init.pre.o $(INIT-OBJECTS)"
+ #action "$(OBJCOPY) --rename-section .text=.init.text --rename-section .data=.init.data --rename-section .rodata=.init.rodata --rename-section .rodata.str1.1=.init.rodata.str1.1 init.pre.o init.o"
+#end
+#
+#makerule linuxbios
+# depends "crt0.o init.o linuxbios_ram.rom ldscript.ld"
+# action "$(CC) -nostdlib -nostartfiles -static -o $@ -T ldscript.ld crt0.o init.o"
+# action "$(CROSS_COMPILE)nm -n linuxbios | sort > linuxbios.map"
+#end
+#
+#else
makerule linuxbios
depends "crt0.o $(INIT-OBJECTS) linuxbios_ram.rom ldscript.ld"
@@ -85,7 +85,7 @@ makerule linuxbios
action "$(CROSS_COMPILE)nm -n linuxbios | sort > linuxbios.map"
end
-end
+#end
makerule linuxbios.a
depends "$(OBJECTS)"
diff --git a/src/cpu/ppc/ppc4xx/Config.lb b/src/cpu/ppc/ppc4xx/Config.lb
index 353c25df2c..4bf4638762 100644
--- a/src/cpu/ppc/ppc4xx/Config.lb
+++ b/src/cpu/ppc/ppc4xx/Config.lb
@@ -20,8 +20,10 @@ initobject cache.S
initobject sdram.c
initobject clock.c
-object mem.o
+config chip.h
object clock.o
object cache.S
+object pci_domain.o
+driver pci_bridge.o
dir /cpu/simple_init
diff --git a/src/cpu/ppc/ppc4xx/chip.h b/src/cpu/ppc/ppc4xx/chip.h
new file mode 100644
index 0000000000..0171a4f9ef
--- /dev/null
+++ b/src/cpu/ppc/ppc4xx/chip.h
@@ -0,0 +1,4 @@
+struct cpu_ppc_ppc4xx_config
+{
+};
+extern struct chip_operations cpu_ppc_ppc4xx_ops;
diff --git a/src/mainboard/embeddedplanet/ep405pc/pci_bridge.c b/src/cpu/ppc/ppc4xx/pci_bridge.c
index 4e67938105..26f608d144 100644..100755
--- a/src/mainboard/embeddedplanet/ep405pc/pci_bridge.c
+++ b/src/cpu/ppc/ppc4xx/pci_bridge.c
@@ -8,7 +8,7 @@
#include <console/console.h>
static void
-pci_bridge_init(struct device *dev)
+pci_bridge_enable(struct device *dev)
{
printk_info("Configure PCI Bridge\n");
@@ -22,7 +22,7 @@ struct device_operations pci_bridge_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
- .init = pci_bridge_init,
+ .enable = pci_bridge_enable,
.scan_bus = 0,
};
diff --git a/src/cpu/ppc/ppc4xx/pci_domain.c b/src/cpu/ppc/ppc4xx/pci_domain.c
new file mode 100644
index 0000000000..f53446dc88
--- /dev/null
+++ b/src/cpu/ppc/ppc4xx/pci_domain.c
@@ -0,0 +1,74 @@
+/*
+ * Initialisation of the PCI bridge .
+ */
+
+#include <arch/io.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <console/console.h>
+
+static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
+{
+ max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
+ return max;
+}
+
+static void pci_domain_read_resources(device_t dev)
+{
+ struct resource *resource;
+
+ /* Initialize the system wide io space constraints */
+ resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
+ resource->limit = 0xffffUL;
+ resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
+
+ /* Initialize the system wide memory resources constraints */
+ resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
+ resource->limit = 0xffffffffULL;
+ resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
+}
+
+static void ram_resource(device_t dev, unsigned long index,
+ unsigned long basek, unsigned long sizek)
+{
+ struct resource *resource;
+
+ if (!sizek) {
+ return;
+ }
+ resource = new_resource(dev, index);
+ resource->base = ((resource_t)basek) << 10;
+ resource->size = ((resource_t)sizek) << 10;
+ resource->flags = IORESOURCE_MEM | IORESOURCE_CACHEABLE | \
+ IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
+}
+
+static void pci_domain_set_resources(device_t dev)
+{
+ int idx = 3; /* who knows? */
+
+ ram_resource(dev, idx, 0, EMBEDDED_RAM_SIZE>>10);
+ assign_resources(&dev->link[0]);
+}
+
+struct device_operations pci_domain_ops = {
+ .read_resources = pci_domain_read_resources,
+ .set_resources = pci_domain_set_resources,
+ .enable_resources = enable_childrens_resources,
+ .init = 0,
+ .scan_bus = pci_domain_scan_bus,
+ .ops_pci_bus = &pci_ppc_conf1
+};
+
+static void enable_dev(struct device *dev)
+{
+ /* Set the operations if it is a special bus type */
+ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
+ dev->ops = &pci_domain_ops;
+ }
+}
+
+struct chip_operations cpu_ppc_ppc4xx_ops = {
+ CHIP_NAME("PPC 4XX CPU")
+ .enable_dev = enable_dev,
+};
diff --git a/src/lib/Config.lb b/src/lib/Config.lb
index 3a1baf66c3..e6234d4c42 100644
--- a/src/lib/Config.lb
+++ b/src/lib/Config.lb
@@ -17,7 +17,7 @@ makedefine .PHONY : version.o
if CONFIG_USE_INIT
initobject uart8250.c
-# initobject memset.o
+ initobject memset.o
initobject memcpy.o
-# initobject memcmp.o
+ initobject memcmp.o
end
diff --git a/src/mainboard/embeddedplanet/ep405pc/Config.lb b/src/mainboard/embeddedplanet/ep405pc/Config.lb
index 9f071bf621..a47d1c6487 100644
--- a/src/mainboard/embeddedplanet/ep405pc/Config.lb
+++ b/src/mainboard/embeddedplanet/ep405pc/Config.lb
@@ -6,16 +6,19 @@
## Early board initialization, called from ppc_main()
##
initobject init.c
-driver pci_bridge.c
arch ppc end
-chip cpu/ppc/ppc4xx device pnp 0.0 on end end
-
-##
-## Include the secondary Configuration files
-##
-chip southbridge/winbond/w83c553 device pnp 0.0 on end end
-
+chip cpu/ppc/ppc4xx
+ device pci_domain 0 on
+ device pci 0.0 on end
+ chip southbridge/winbond/w83c553
+ device pci 9.0 on end # ISA bridge
+ device pci 9.1 on end # IDE contoller
+ end
+ device pci e.0 on end
+ end
+end
+
##
## Build the objects we have code for in this directory.
##
diff --git a/src/mainboard/embeddedplanet/ep405pc/Options.lb b/src/mainboard/embeddedplanet/ep405pc/Options.lb
index d37db77dc2..3275aa297d 100644
--- a/src/mainboard/embeddedplanet/ep405pc/Options.lb
+++ b/src/mainboard/embeddedplanet/ep405pc/Options.lb
@@ -69,8 +69,8 @@ default _IO_BASE=ISA_IO_BASE
default TTYS0_BASE=0xef600300-ISA_IO_BASE
## Enable PPC405 instructions
-default CPU_OPT="-Wa,-m405"
-default CPU_OPT=""
+default CPU_OPT="-mcpu=405"
+#default CPU_OPT=""
## Use stage 1 initialization code
default CONFIG_USE_INIT=1
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-07 04:03:14 +0000