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-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
index c0831459bd..45badcddbd 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
@@ -90,6 +90,14 @@ chip soc/intel/apollolake
# Minimum SLP S3 assertion width 28ms.
register "slp_s3_assertion_width_usecs" = "28000"
+ register "sgx_enable" = "1"
+
+ # PRMRR size options
+ # 0x02000000 - 32MiB
+ # 0x04000000 - 64MiB
+ # 0x08000000 - 128MiB
+ register "PrmrrSize" = "128 * MiB"
+
device domain 0 on
device pci 00.0 on end # - Host Bridge
device pci 00.1 on end # - DPTF