diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/eve/devicetree.cb | 3 | ||||
-rw-r--r-- | src/mainboard/google/eve/gpio.h | 9 | ||||
-rw-r--r-- | src/mainboard/google/eve/mainboard.c | 4 |
3 files changed, 13 insertions, 3 deletions
diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 3321565f52..dfe7281d8d 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -260,7 +260,8 @@ chip soc/intel/skylake register "hid" = "ACPI_DT_NAMESPACE_HID" register "uid" = "1" register "compat_string" = ""fpc,fpc1020"" - register "irq" = "IRQ_EDGE_LOW(GPP_C8_IRQ)" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_HIGH(GPP_C8)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C9)" device spi 0 on end end end # GSPI #1 diff --git a/src/mainboard/google/eve/gpio.h b/src/mainboard/google/eve/gpio.h index f5b09d9bcf..85011f129a 100644 --- a/src/mainboard/google/eve/gpio.h +++ b/src/mainboard/google/eve/gpio.h @@ -103,8 +103,8 @@ static const struct pad_config gpio_table[] = { /* SML0ALERT# */ PAD_CFG_NC(GPP_C5), /* SM1CLK */ PAD_CFG_GPI(GPP_C6, 20K_PU, DEEP), /* EC_IN_RW */ /* SM1DATA */ PAD_CFG_NC(GPP_C7), -/* UART0_RXD */ PAD_CFG_GPI_APIC(GPP_C8, NONE, PLTRST), /* FP_INT */ -/* UART0_TXD */ PAD_CFG_GPO(GPP_C9, 0, DEEP), /* FP_RST_ODL */ +/* UART0_RXD */ PAD_CFG_GPI(GPP_C8, NONE, PLTRST), /* FP_INT */ +/* UART0_TXD */ PAD_CFG_GPO(GPP_C9, 1, DEEP), /* FP_RST_ODL */ /* UART0_RTS# */ PAD_CFG_NC(GPP_C10), /* UART0_CTS# */ PAD_CFG_NC(GPP_C11), /* UART1_RXD */ PAD_CFG_GPI(GPP_C12, NONE, DEEP), /* MEM_CONFIG[0] */ @@ -231,6 +231,11 @@ static const struct pad_config early_gpio_table[] = { /* UART2_TXD */ PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* SERVO */ }; +static const struct pad_config late_gpio_table[] = { +/* UART0_RXD */ PAD_CFG_GPI(GPP_C8, NONE, PLTRST), /* FP_INT */ +/* UART0_TXD */ PAD_CFG_GPO(GPP_C9, 1, DEEP), /* FP_RST_ODL */ +}; + #endif #endif diff --git a/src/mainboard/google/eve/mainboard.c b/src/mainboard/google/eve/mainboard.c index bffc9e6a15..bb3c6bdb84 100644 --- a/src/mainboard/google/eve/mainboard.c +++ b/src/mainboard/google/eve/mainboard.c @@ -18,10 +18,14 @@ #include <device/device.h> #include <ec/ec.h> #include <vendorcode/google/chromeos/chromeos.h> +#include <gpio.h> +#include <soc/gpio.h> +#include "gpio.h" static void mainboard_init(device_t dev) { mainboard_ec_init(); + gpio_configure_pads(late_gpio_table, ARRAY_SIZE(late_gpio_table)); } static void mainboard_enable(device_t dev) |