diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu/amd/dualcore/dualcore.c | 7 | ||||
| -rw-r--r-- | src/cpu/amd/model_fxx/init_cpus.c | 2 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/coherent_ht.c | 3 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/raminit.c | 9 |
4 files changed, 12 insertions, 9 deletions
diff --git a/src/cpu/amd/dualcore/dualcore.c b/src/cpu/amd/dualcore/dualcore.c index 51ef6034f7..5a61fac699 100644 --- a/src/cpu/amd/dualcore/dualcore.c +++ b/src/cpu/amd/dualcore/dualcore.c @@ -56,9 +56,10 @@ static inline void start_other_cores(void) unsigned nodes; unsigned nodeid; - if(read_option(CMOS_VSTART_dual_core, CMOS_VLEN_dual_core, 0) != 0) { // disable dual_core - return; - } + if (HAVE_OPTION_TABLE && + read_option(CMOS_VSTART_dual_core, CMOS_VLEN_dual_core, 0) != 0) { + return; // disable dual_core + } nodes = get_nodes(); diff --git a/src/cpu/amd/model_fxx/init_cpus.c b/src/cpu/amd/model_fxx/init_cpus.c index e341b97b64..8b613a624e 100644 --- a/src/cpu/amd/model_fxx/init_cpus.c +++ b/src/cpu/amd/model_fxx/init_cpus.c @@ -72,7 +72,7 @@ static void for_each_ap(unsigned bsp_apicid, unsigned core_range, process_ap_t p nodes = get_nodes(); disable_siblings = !CONFIG_LOGICAL_CPUS; -#if CONFIG_LOGICAL_CPUS == 1 +#if CONFIG_LOGICAL_CPUS == 1 && HAVE_OPTION_TABLE == 1 if(read_option(CMOS_VSTART_dual_core, CMOS_VLEN_dual_core, 0) != 0) { // 0 mean dual core disable_siblings = 1; } diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c index a224f5d7a6..d24a83c68f 100644 --- a/src/northbridge/amd/amdk8/coherent_ht.c +++ b/src/northbridge/amd/amdk8/coherent_ht.c @@ -1597,7 +1597,8 @@ static void coherent_ht_finalize(unsigned nodes) #if CONFIG_LOGICAL_CPUS==1 unsigned total_cpus; - if(read_option(CMOS_VSTART_dual_core, CMOS_VLEN_dual_core, 0) == 0) { /* dual_core */ + if ((!HAVE_OPTION_TABLE) || + read_option(CMOS_VSTART_dual_core, CMOS_VLEN_dual_core, 0) == 0) { /* dual_core */ total_cpus = verify_dualcore(nodes); } else { diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c index 4b4b0e9c82..ea706b8e05 100644 --- a/src/northbridge/amd/amdk8/raminit.c +++ b/src/northbridge/amd/amdk8/raminit.c @@ -598,11 +598,11 @@ static void hw_enable_ecc(const struct mem_controller *ctrl) if (nbcap & NBCAP_ECC) { dcl |= DCL_DimmEccEn; } - if (read_option(CMOS_VSTART_ECC_memory, CMOS_VLEN_ECC_memory, 1) == 0) { + if (HAVE_OPTION_TABLE && + read_option(CMOS_VSTART_ECC_memory, CMOS_VLEN_ECC_memory, 1) == 0) { dcl &= ~DCL_DimmEccEn; } pci_write_config32(ctrl->f2, DRAM_CONFIG_LOW, dcl); - } static int is_dual_channel(const struct mem_controller *ctrl) @@ -1146,7 +1146,8 @@ static void order_dimms(const struct mem_controller *ctrl) { unsigned long tom_k, base_k; - if (read_option(CMOS_VSTART_interleave_chip_selects, CMOS_VLEN_interleave_chip_selects, 1) != 0) { + if ((!HAVE_OPTION_TABLE) || + read_option(CMOS_VSTART_interleave_chip_selects, CMOS_VLEN_interleave_chip_selects, 1) != 0) { tom_k = interleave_chip_selects(ctrl); } else { print_debug("Interleaving disabled\r\n"); @@ -1450,7 +1451,7 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller * min_cycle_time = min_cycle_times[(value >> NBCAP_MEMCLK_SHIFT) & NBCAP_MEMCLK_MASK]; bios_cycle_time = min_cycle_times[ read_option(CMOS_VSTART_max_mem_clock, CMOS_VLEN_max_mem_clock, 0)]; - if (bios_cycle_time > min_cycle_time) { + if (HAVE_OPTION_TABLE && bios_cycle_time > min_cycle_time) { min_cycle_time = bios_cycle_time; } min_latency = 2; |