summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/icelake/Makefile.inc33
1 files changed, 7 insertions, 26 deletions
diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc
index 80dcdc118c..a4ebd20580 100644
--- a/src/soc/intel/icelake/Makefile.inc
+++ b/src/soc/intel/icelake/Makefile.inc
@@ -8,29 +8,26 @@ subdirs-y += ../../../cpu/x86/mtrr
subdirs-y += ../../../cpu/x86/smm
subdirs-y += ../../../cpu/x86/tsc
+# all (bootblock, verstage, romstage, postcar, ramstage)
+all-y += gspi.c
+all-y += i2c.c
+all-y += pmutil.c
+all-y += spi.c
+all-y += uart.c
+
bootblock-y += bootblock/bootblock.c
bootblock-y += bootblock/cpu.c
bootblock-y += bootblock/pch.c
-bootblock-y += pmutil.c
bootblock-y += bootblock/report_platform.c
bootblock-y += espi.c
bootblock-y += gpio.c
-bootblock-y += gspi.c
-bootblock-y += i2c.c
bootblock-y += memmap.c
-bootblock-y += spi.c
bootblock-y += p2sb.c
-bootblock-y += uart.c
romstage-y += espi.c
romstage-y += gpio.c
-romstage-y += gspi.c
-romstage-y += i2c.c
romstage-y += memmap.c
-romstage-y += pmutil.c
romstage-y += reset.c
-romstage-y += spi.c
-romstage-y += uart.c
ramstage-y += acpi.c
ramstage-y += chip.c
@@ -41,18 +38,13 @@ ramstage-y += finalize.c
ramstage-y += fsp_params.c
ramstage-y += gpio.c
ramstage-y += graphics.c
-ramstage-y += gspi.c
-ramstage-y += i2c.c
ramstage-y += lockdown.c
ramstage-y += memmap.c
ramstage-y += p2sb.c
ramstage-y += pmc.c
-ramstage-y += pmutil.c
ramstage-y += reset.c
ramstage-y += smmrelocate.c
-ramstage-y += spi.c
ramstage-y += systemagent.c
-ramstage-y += uart.c
ramstage-y += sd.c
smm-y += gpio.c
@@ -63,17 +55,6 @@ smm-y += smihandler.c
smm-y += uart.c
postcar-y += memmap.c
-postcar-y += pmutil.c
-postcar-y += i2c.c
-postcar-y += gspi.c
-postcar-y += spi.c
-postcar-y += uart.c
-
-verstage-y += gspi.c
-verstage-y += i2c.c
-verstage-y += pmutil.c
-verstage-y += spi.c
-verstage-y += uart.c
CPPFLAGS_common += -I$(src)/soc/intel/icelake
CPPFLAGS_common += -I$(src)/soc/intel/icelake/include