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-rw-r--r--src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl31
1 files changed, 28 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
index 15e4d2f122..1334df11c4 100644
--- a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
+++ b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
@@ -56,6 +56,16 @@ Device(SBUS) {
/* 0:14.7 - SD Controller */
Device(SDCN) {
Name(_ADR, 0x00140007)
+
+ Method(_PS0) {
+ FDDC(24, 0)
+ }
+ Method(_PS3) {
+ FDDC(24, 3)
+ }
+ Method(_PSC) {
+ Return(SDTD)
+ }
} /* end SDCN */
Name(CRES, ResourceTemplate() {
@@ -286,8 +296,9 @@ Field( SMIC, ByteAcc, NoLock, Preserve) {
offset (0x1e70), /* SD D3 Control */
SDTD, 2,
, 1,
+ SDPD, 1,
+ , 1,
, 1,
- , 2,
SDRT, 1,
SDSC, 1,
@@ -433,7 +444,14 @@ Method(FDDC, 2, Serialized)
/* todo Case(15) { STD0()} */ /* SATA */
Case(18) { U2D0()} /* EHCI */
Case(23) { U3D0()} /* XHCI */
-/* todo Case(24) { SDD0()} */ /* SD */
+ Case(24) { /* SD */
+ Store(0x00, SDTD)
+ Store(One, SDPD)
+ Store(SDDS, Local0)
+ while(LNotEqual(Local0,0x7)) {
+ Store(SDDS, Local0)
+ }
+ }
}
} else {
/* put device into D3cold */
@@ -489,7 +507,14 @@ Method(FDDC, 2, Serialized)
/* todo Case(15) { STD3()} */ /* SATA */
Case(18) { U2D3()} /* EHCI */
Case(23) { U3D3()} /* XHCI */
-/* todo Case(24) { SDD3()} */ /* SD */
+ Case(24) { /* SD */
+ Store(Zero, SDPD)
+ Store(SDDS, Local0)
+ while(LNotEqual(Local0,0x0)) {
+ Store(SDDS, Local0)
+ }
+ Store(0x03, SDTD)
+ }
}
/* Turn off Power */
if(LEqual(I0TD, 3)) {