summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/amd/amdmct/mct/mctndi_d.c3
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctndi_d.c2
2 files changed, 3 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mctndi_d.c b/src/northbridge/amd/amdmct/mct/mctndi_d.c
index a408d4707d..cfc91f7a26 100644
--- a/src/northbridge/amd/amdmct/mct/mctndi_d.c
+++ b/src/northbridge/amd/amdmct/mct/mctndi_d.c
@@ -1,6 +1,7 @@
/*
* This file is part of the coreboot project.
*
+ * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
@@ -27,7 +28,7 @@ void InterleaveNodes_D(struct MCTStatStruc *pMCTstat,
u8 Node;
u32 Base;
u32 MemSize, MemSize0 = 0;
- u32 Dct0MemSize, DctSelBase, DctSelBaseOffset = 0;
+ u32 Dct0MemSize = 0, DctSelBase, DctSelBaseOffset = 0;
u8 Nodes;
u8 NodesWmem;
u8 DoIntlv;
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctndi_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctndi_d.c
index 520a178e88..0cfbc657c1 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctndi_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctndi_d.c
@@ -24,7 +24,7 @@ void InterleaveNodes_D(struct MCTStatStruc *pMCTstat,
u8 Node;
u32 Base;
u32 MemSize, MemSize0 = 0;
- u32 Dct0MemSize, DctSelBase, DctSelBaseOffset = 0;
+ u32 Dct0MemSize = 0, DctSelBase, DctSelBaseOffset = 0;
u8 Nodes;
u8 NodesWmem;
u8 DoIntlv;