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-rw-r--r--src/cpu/x86/cache/cache.c3
-rw-r--r--src/include/console/post_codes.h7
2 files changed, 8 insertions, 2 deletions
diff --git a/src/cpu/x86/cache/cache.c b/src/cpu/x86/cache/cache.c
index a7cba4ac5c..1df9e08014 100644
--- a/src/cpu/x86/cache/cache.c
+++ b/src/cpu/x86/cache/cache.c
@@ -3,8 +3,7 @@
void x86_enable_cache(void)
{
- post_code(0x60);
+ post_code(POST_ENABLING_CACHE);
printk(BIOS_INFO, "Enabling cache\n");
enable_cache();
}
-
diff --git a/src/include/console/post_codes.h b/src/include/console/post_codes.h
index a72da69bd5..1d12e5ad3f 100644
--- a/src/include/console/post_codes.h
+++ b/src/include/console/post_codes.h
@@ -106,6 +106,13 @@
#define POST_CONSOLE_BOOT_MSG 0x40
/**
+ * \brief Before enabling the cache
+ *
+ * Going to enable the cache
+ */
+#define POST_ENABLING_CACHE 0x60
+
+/**
* \brief Devices have been enumerated
*
* Bus scan, and device enumeration has completed.