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-rw-r--r--src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb
index d7f187356f..a03ecc5eba 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb
+++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb
@@ -52,22 +52,27 @@ chip soc/intel/skylake
end
device pci 1c.0 on # PCH PCIe Port 1 / PCIe Slot 4 (JPCIE4)
register "PcieRpEnable[0]" = "1"
+ register "PcieRpLtrEnable[0]" = "1"
smbios_slot_desc "SlotTypePciExpressGen3X8" "SlotLengthShort" "PCH SLOT4 PCI-E 3.0 X4(IN X8)" "SlotDataBusWidth4X"
end
device pci 1c.4 on # PCH PCIe Port 5 / PCIe Slot 5 (JPCIE5)
register "PcieRpEnable[4]" = "1"
+ register "PcieRpLtrEnable[4]" = "1"
smbios_slot_desc "SlotTypePciExpressGen3X8" "SlotLengthShort" "PCH SLOT5 PCI-E 3.0 X4(IN X8)" "SlotDataBusWidth4X"
end
device pci 1d.0 on # PCH PCIe Port 9
register "PcieRpEnable[8]" = "1"
+ register "PcieRpLtrEnable[8]" = "1"
device pci 00.0 on end # GbE 1
end
device pci 1d.1 on # PCH PCIe Port 10
register "PcieRpEnable[9]" = "1"
+ register "PcieRpLtrEnable[9]" = "1"
device pci 00.1 on end # GbE 2
end
device pci 1d.2 on # PCH PCIe Port 11
register "PcieRpEnable[10]" = "1"
+ register "PcieRpLtrEnable[10]" = "1"
device pci 00.0 on # Aspeed PCI Bridge
device pci 00.0 on end # Aspeed 2400 VGA
end