6 files changed, 63 insertions, 7 deletions
diff --git a/src/cpu/k7/Config.lb b/src/cpu/k7/Config.lb
index d631c6fd49..3c45a215b7 100644
--- a/src/cpu/k7/Config.lb
+++ b/src/cpu/k7/Config.lb
@@ -1,3 +1,4 @@
 uses k7
 uses CPU_FIXUP
+dir /cpu/p6
 #object cpufixup.o
diff --git a/src/cpu/k8/Config.lb b/src/cpu/k8/Config.lb
index f1f63e263e..c44659517a 100644
--- a/src/cpu/k8/Config.lb
+++ b/src/cpu/k8/Config.lb
@@ -1,4 +1,6 @@
 uses CPU_FIXUP
+dir /cpu/k7
+config chip.h
 if CPU_FIXUP
   object cpufixup.o
   object apic_timer.o
diff --git a/src/cpu/k8/cpufixup.c b/src/cpu/k8/cpufixup.c
index fa9c1d2a52..4976bee578 100644
--- a/src/cpu/k8/cpufixup.c
+++ b/src/cpu/k8/cpufixup.c
@@ -4,6 +4,9 @@
 #include <cpu/p6/msr.h>
 #include <cpu/k8/mtrr.h>
 #include <device/device.h>
+#include <device/chip.h>
+
+#include "chip.h"
 
 void k8_cpufixup(struct mem_range *mem)
 {
@@ -51,3 +54,27 @@ void k8_cpufixup(struct mem_range *mem)
 	msr.lo |= SYSCFG_MSR_MtrrVarDramEn | SYSCFG_MSR_TOM2En;
 	wrmsr(SYSCFG_MSR, msr);
 }
+
+static
+void k8_enable(struct chip *chip, enum chip_pass pass)
+{
+
+        struct cpu_k8_config *conf = (struct cpu_k8_config *)chip->chip_info;
+
+        switch (pass) {
+        case CONF_PASS_PRE_CONSOLE:
+                break;
+        default:
+                /* nothing yet */
+                break;
+        }
+}
+
+struct chip_control cpu_k8_control = {
+        enable: k8_enable,
+        name:   "AMD K8"
+};
+
+
+
+
diff --git a/src/cpu/p6/Config.lb b/src/cpu/p6/Config.lb
index fb6d9ab996..fb02707c7e 100644
--- a/src/cpu/p6/Config.lb
+++ b/src/cpu/p6/Config.lb
@@ -1,5 +1,6 @@
 uses i686
 uses INTEL_PPRO_MTRR
+dir /cpu/p5
 #object microcode.o
 object mtrr.o
 #object l2_cache.o
diff --git a/src/mainboard/arima/hdama/Config.lb b/src/mainboard/arima/hdama/Config.lb
index a136eeca13..fb1f85a917 100644
--- a/src/mainboard/arima/hdama/Config.lb
+++ b/src/mainboard/arima/hdama/Config.lb
@@ -145,18 +145,21 @@ mainboardinit cpu/k8/disable_mmx_sse.inc
 ###
 northbridge amd/amdk8
 end
-southbridge amd/amd8111
+southbridge amd/amd8111 "amd8111"
 end
-southbridge amd/amd8131
+southbridge amd/amd8131 "amd8131"
 end
 #mainboardinit archi386/smp/secondary.inc
 superio NSC/pc87360
 	register "com1" = "{1}"
 	register "lpt" = "{1}"
 end
-dir /pc80
+# dir /pc80
 ##dir /src/superio/winbond/w83627hf
-cpu p5 end
-cpu p6 end
-cpu k7 end
-cpu k8 end
+dir /cpu/k8
+cpu k8 "cpu0" 
+  register "up" = "{.chip = &amd8111, .ht_width=8, .ht_speed=200}"
+end
+
+cpu k8 "cpu1" 
+end
diff --git a/src/mainboard/arima/hdama/mainboard.c b/src/mainboard/arima/hdama/mainboard.c
index 2118e83927..2b2230eb09 100644
--- a/src/mainboard/arima/hdama/mainboard.c
+++ b/src/mainboard/arima/hdama/mainboard.c
@@ -4,8 +4,30 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 
+#include <arch/io.h>
+#include <device/chip.h>
+#include "chip.h"
+
 
 unsigned long initial_apicid[MAX_CPUS] =
 {
 	0, 1,
 };
+
+static void
+enable(struct chip *chip, enum chip_pass pass)
+{
+
+        struct mainboard_arima_hdama_config *conf =
+                (struct mainboard_arima_hdama_config *)chip->chip_info;
+
+        switch (pass) {
+                default: break;
+        }
+
+}
+struct chip_control mainboard_arima_hdama_control = {
+                enable: enable,
+                name:   "Arima HDAMA mainboard "
+};
+