diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/ocp/wedge100s/Kconfig | 10 | ||||
| -rw-r--r-- | src/mainboard/ocp/wedge100s/cmos.layout | 1 | ||||
| -rw-r--r-- | src/mainboard/ocp/wedge100s/vboot-ro.fmd | 22 |
3 files changed, 33 insertions, 0 deletions
diff --git a/src/mainboard/ocp/wedge100s/Kconfig b/src/mainboard/ocp/wedge100s/Kconfig index 5d4349d377..df6c57e09d 100644 --- a/src/mainboard/ocp/wedge100s/Kconfig +++ b/src/mainboard/ocp/wedge100s/Kconfig @@ -16,6 +16,14 @@ config BOARD_SPECIFIC_OPTIONS select MAINBOARD_HAS_LPC_TPM select MAINBOARD_HAS_TPM1 +config VBOOT + select VBOOT_VBNV_CMOS + select VBOOT_NO_BOARD_SUPPORT + select GBB_FLAG_DISABLE_LID_SHUTDOWN + select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_FWMP + config MAINBOARD_DIR string default "ocp/wedge100s" @@ -30,6 +38,7 @@ config IRQ_SLOT_COUNT config CBFS_SIZE hex + default 0x006fa000 if VBOOT default 0x00200000 config VIRTUAL_ROM_SIZE @@ -45,6 +54,7 @@ config FSP_PACKAGE_DEFAULT config FMDFILE string + default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-ro.fmd" if VBOOT default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/board.fmd" endif # BOARD_OCP_WEDGE100S diff --git a/src/mainboard/ocp/wedge100s/cmos.layout b/src/mainboard/ocp/wedge100s/cmos.layout index 3c5bc3b03d..3aaa56b569 100644 --- a/src/mainboard/ocp/wedge100s/cmos.layout +++ b/src/mainboard/ocp/wedge100s/cmos.layout @@ -81,6 +81,7 @@ entries 408 1 e 1 nmi 409 2 e 7 power_on_after_fail #411 5 r 0 unused +416 128 r 0 vbnv # MRC Scrambler Seed values 896 32 r 0 mrc_scrambler_seed diff --git a/src/mainboard/ocp/wedge100s/vboot-ro.fmd b/src/mainboard/ocp/wedge100s/vboot-ro.fmd new file mode 100644 index 0000000000..a591bae973 --- /dev/null +++ b/src/mainboard/ocp/wedge100s/vboot-ro.fmd @@ -0,0 +1,22 @@ +FLASH 16M { + SI_ALL@0x0 0x800000 { + SI_DESC@0x0 0x1000 + SI_ME@0x1000 0x7ff000 + } + SI_BIOS@0x800000 0x800000 { + MISC_RW@0x0 0x20000 { + RW_MRC_CACHE@0x0 0x10000 + RW_VPD@0x010000 0x4000 + } + WP_RO@0x020000 0x7e0000 { + RO_VPD@0x0 0x4000 + RO_SECTION@0x4000 0x7dc000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0xef000 + COREBOOT(CBFS)@0xf0000 0x6ec000 + } + } + } +} |