summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/devicetree.cb3
-rw-r--r--src/mainboard/google/hatch/variants/kohaku/overridetree.cb3
2 files changed, 5 insertions, 1 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
index 00198a5a81..c87a8bcfe7 100644
--- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
@@ -168,11 +168,12 @@ chip soc/intel/cannonlake
register "PcieClkSrcUsage[3]" = "13"
register "PcieClkSrcClkReq[3]" = "3"
- #Enable I2S Audio, SSP0, SSP1 and DMIC0
+ #Enable I2S Audio, SSP0, SSP1 and DMIC0, default DMIC1 N/A (by variants override)
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkSsp0" = "1"
register "PchHdaAudioLinkSsp1" = "1"
register "PchHdaAudioLinkDmic0" = "1"
+ register "PchHdaAudioLinkDmic1" = "0"
# GPIO PM programming
register "gpio_override_pm" = "1"
diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
index 13025c83f7..84a90ae68d 100644
--- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
@@ -20,6 +20,9 @@ chip soc/intel/cannonlake
# No PCIe WiFi
register "PcieRpEnable[13]" = "0"
+ # Enable DMIC1
+ register "PchHdaAudioLinkDmic1" = "1"
+
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |