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-rw-r--r--src/mainboard/google/dedede/Kconfig2
-rw-r--r--src/mainboard/google/dedede/Kconfig.name6
-rw-r--r--src/mainboard/google/dedede/variants/waddledee/Makefile.inc11
-rw-r--r--src/mainboard/google/dedede/variants/waddledee/include/variant/ec.h14
-rw-r--r--src/mainboard/google/dedede/variants/waddledee/include/variant/gpio.h14
-rw-r--r--src/mainboard/google/dedede/variants/waddledee/overridetree.cb40
6 files changed, 87 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig
index 36b42bf8b3..e2afc66a05 100644
--- a/src/mainboard/google/dedede/Kconfig
+++ b/src/mainboard/google/dedede/Kconfig
@@ -53,6 +53,7 @@ config MAINBOARD_PART_NUMBER
string
default "Dedede" if BOARD_GOOGLE_DEDEDE
default "Waddledoo" if BOARD_GOOGLE_WADDLEDOO
+ default "Waddledee" if BOARD_GOOGLE_WADDLEDEE
config MAX_CPUS
int
@@ -74,5 +75,6 @@ config VARIANT_DIR
string
default "dedede" if BOARD_GOOGLE_DEDEDE
default "waddledoo" if BOARD_GOOGLE_WADDLEDOO
+ default "waddledee" if BOARD_GOOGLE_WADDLEDEE
endif #BOARD_GOOGLE_BASEBOARD_DEDEDE
diff --git a/src/mainboard/google/dedede/Kconfig.name b/src/mainboard/google/dedede/Kconfig.name
index ae5df66df5..d083d2dd8a 100644
--- a/src/mainboard/google/dedede/Kconfig.name
+++ b/src/mainboard/google/dedede/Kconfig.name
@@ -9,3 +9,9 @@ config BOARD_GOOGLE_WADDLEDOO
select BOARD_GOOGLE_BASEBOARD_DEDEDE
select BASEBOARD_DEDEDE_LAPTOP
select BOARD_ROMSIZE_KB_32768
+
+config BOARD_GOOGLE_WADDLEDEE
+ bool "Waddledee"
+ select BOARD_GOOGLE_BASEBOARD_DEDEDE
+ select BASEBOARD_DEDEDE_LAPTOP
+ select BOARD_ROMSIZE_KB_32768
diff --git a/src/mainboard/google/dedede/variants/waddledee/Makefile.inc b/src/mainboard/google/dedede/variants/waddledee/Makefile.inc
new file mode 100644
index 0000000000..c55051b9fc
--- /dev/null
+++ b/src/mainboard/google/dedede/variants/waddledee/Makefile.inc
@@ -0,0 +1,11 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2020 The coreboot project Authors.
+##
+## SPDX-License-Identifier: GPL-2.0-or-later
+##
+
+SPD_SOURCES = empty #0b0000
+SPD_SOURCES += Micron_MT53E512M32D2NP_2GB #0b0001
+SPD_SOURCES += samsung-K4U6E3S4AA-MGCL #0b0010
diff --git a/src/mainboard/google/dedede/variants/waddledee/include/variant/ec.h b/src/mainboard/google/dedede/variants/waddledee/include/variant/ec.h
new file mode 100644
index 0000000000..cc897dcdcf
--- /dev/null
+++ b/src/mainboard/google/dedede/variants/waddledee/include/variant/ec.h
@@ -0,0 +1,14 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2020 The coreboot project Authors.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef MAINBOARD_EC_H
+#define MAINBOARD_EC_H
+
+#include <baseboard/ec.h>
+
+#endif
diff --git a/src/mainboard/google/dedede/variants/waddledee/include/variant/gpio.h b/src/mainboard/google/dedede/variants/waddledee/include/variant/gpio.h
new file mode 100644
index 0000000000..bf23f6e457
--- /dev/null
+++ b/src/mainboard/google/dedede/variants/waddledee/include/variant/gpio.h
@@ -0,0 +1,14 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2020 The coreboot project Authors.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef MAINBOARD_GPIO_H
+#define MAINBOARD_GPIO_H
+
+#include <baseboard/gpio.h>
+
+#endif /* MAINBOARD_GPIO_H */
diff --git a/src/mainboard/google/dedede/variants/waddledee/overridetree.cb b/src/mainboard/google/dedede/variants/waddledee/overridetree.cb
new file mode 100644
index 0000000000..23db34e66c
--- /dev/null
+++ b/src/mainboard/google/dedede/variants/waddledee/overridetree.cb
@@ -0,0 +1,40 @@
+chip soc/intel/tigerlake
+
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| GSPI0 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| I2C0 | Trackpad |
+ #| I2C1 | Digitizer |
+ #| I2C2 | Touchscreen |
+ #| I2C3 | Camera |
+ #| I2C4 | Audio |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[1] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[2] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[3] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ },
+ }"
+
+ device domain 0 on end
+end