diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/x86/car.ld | 2 | ||||
-rw-r--r-- | src/arch/x86/cbmem.c | 44 | ||||
-rw-r--r-- | src/arch/x86/include/arch/cpu.h | 5 | ||||
-rw-r--r-- | src/arch/x86/postcar_loader.c | 10 | ||||
-rw-r--r-- | src/console/init.c | 6 | ||||
-rw-r--r-- | src/include/cbmem.h | 7 | ||||
-rw-r--r-- | src/include/console/cbmem_console.h | 7 | ||||
-rw-r--r-- | src/include/timestamp.h | 5 | ||||
-rw-r--r-- | src/lib/Makefile.inc | 4 | ||||
-rw-r--r-- | src/lib/cbmem_common.c | 16 | ||||
-rw-r--r-- | src/lib/cbmem_console.c | 6 | ||||
-rw-r--r-- | src/lib/hardwaremain.c | 8 | ||||
-rw-r--r-- | src/lib/imd_cbmem.c | 9 | ||||
-rw-r--r-- | src/lib/prog_loaders.c | 3 | ||||
-rw-r--r-- | src/lib/timestamp.c | 22 |
15 files changed, 28 insertions, 126 deletions
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld index 5669020b87..86656829ab 100644 --- a/src/arch/x86/car.ld +++ b/src/arch/x86/car.ld @@ -43,7 +43,7 @@ * in size. Therefore place them at the beginning .car.data section * so that multiple stages (romstage and verstage) have a consistent * link address of these shared objects. */ - PRERAM_CBMEM_CONSOLE(., (CONFIG_LATE_CBMEM_INIT ? 0 : CONFIG_PRERAM_CBMEM_CONSOLE_SIZE)) + PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE) #if IS_ENABLED(CONFIG_PAGING_IN_CACHE_AS_RAM) . = ALIGN(32); /* Page directory pointer table resides here. There are 4 8-byte entries diff --git a/src/arch/x86/cbmem.c b/src/arch/x86/cbmem.c index b3d89f4953..73967e17f8 100644 --- a/src/arch/x86/cbmem.c +++ b/src/arch/x86/cbmem.c @@ -15,55 +15,23 @@ #include <cbmem.h> #include <arch/acpi.h> -#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) - -void __weak backup_top_of_low_cacheable(uintptr_t ramtop) -{ - /* Do nothing. Chipset may have implementation to save ramtop in NVRAM. - */ -} - -uintptr_t __weak restore_top_of_low_cacheable(void) -{ - return 0; -} - -#endif /* LATE_CBMEM_INIT */ - #if IS_ENABLED(CONFIG_CBMEM_TOP_BACKUP) -static void *cbmem_top_backup; - -void set_late_cbmem_top(uintptr_t ramtop) -{ - backup_top_of_low_cacheable(ramtop); - if (ENV_RAMSTAGE) - cbmem_top_backup = (void *)ramtop; -} - -/* Top of CBMEM is at highest usable DRAM address below 4GiB. */ -uintptr_t __weak restore_cbmem_top(void) -{ - if (IS_ENABLED(CONFIG_LATE_CBMEM_INIT) && ENV_ROMSTAGE) - if (!acpi_is_wakeup_s3()) - return 0; - - return restore_top_of_low_cacheable(); -} - void *cbmem_top(void) { - uintptr_t top_backup; + static void *cbmem_top_backup; + void *top_backup; if (ENV_RAMSTAGE && cbmem_top_backup != NULL) return cbmem_top_backup; - top_backup = restore_cbmem_top(); + /* Top of CBMEM is at highest usable DRAM address below 4GiB. */ + top_backup = (void *)restore_top_of_low_cacheable(); if (ENV_RAMSTAGE) - cbmem_top_backup = (void *)top_backup; + cbmem_top_backup = top_backup; - return (void *)top_backup; + return top_backup; } #endif /* CBMEM_TOP_BACKUP */ diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index 00696e6bea..b50fef2b56 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -271,11 +271,6 @@ struct postcar_frame { int postcar_frame_init(struct postcar_frame *pcf, size_t stack_size); /* - * Initialize postcar_frame object with a fixed stacktop in low memory. - */ -void postcar_frame_init_lowmem(struct postcar_frame *pcf); - -/* * Add variable MTRR covering the provided range with MTRR type. */ void postcar_frame_add_mtrr(struct postcar_frame *pcf, diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c index 2342fb9fb8..141e8d23ae 100644 --- a/src/arch/x86/postcar_loader.c +++ b/src/arch/x86/postcar_loader.c @@ -60,16 +60,6 @@ int postcar_frame_init(struct postcar_frame *pcf, size_t stack_size) return 0; } -/* - * For use with LATE_CBMEM_INIT boards only, with a fixed stacktop in - * low memory. - */ -void postcar_frame_init_lowmem(struct postcar_frame *pcf) -{ - postcar_frame_prepare(pcf); - pcf->stack = CONFIG_RAMTOP; -} - void postcar_frame_add_mtrr(struct postcar_frame *pcf, uintptr_t addr, size_t size, int type) { diff --git a/src/console/init.c b/src/console/init.c index 89f908f0c6..8f71b09881 100644 --- a/src/console/init.c +++ b/src/console/init.c @@ -35,8 +35,7 @@ static int console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL; static inline int get_log_level(void) { - if (!IS_ENABLED(CONFIG_LATE_CBMEM_INIT) && - car_get_var(console_inited) == 0) + if (car_get_var(console_inited) == 0) return -1; if (CONSOLE_LEVEL_CONST) return get_console_loglevel(); @@ -79,8 +78,7 @@ asmlinkage void console_init(void) console_hw_init(); - if (!IS_ENABLED(CONFIG_LATE_CBMEM_INIT)) - car_set_var(console_inited, 1); + car_set_var(console_inited, 1); printk(BIOS_NOTICE, "\n\ncoreboot-%s%s %s " ENV_STRING " starting...\n", coreboot_version, coreboot_extra_version, coreboot_build); diff --git a/src/include/cbmem.h b/src/include/cbmem.h index 562829801e..ad48e357b7 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -156,15 +156,8 @@ void cbmem_add_records_to_cbtable(struct lb_header *header); * value stored in nvram to enable early recovery on S3 path. */ #if IS_ENABLED(CONFIG_ARCH_X86) -/* Note that with LATE_CBMEM_INIT, restore_top_of_low_cacheable() - * may conditionally return 0 when the sleep type is non S3, - * i.e. cold and warm boots would return NULL also for cbmem_top. */ void backup_top_of_low_cacheable(uintptr_t ramtop); uintptr_t restore_top_of_low_cacheable(void); -uintptr_t restore_cbmem_top(void); - -/* Deprecated, only use with LATE_CBMEM_INIT. */ -void set_late_cbmem_top(uintptr_t ramtop); #endif /* diff --git a/src/include/console/cbmem_console.h b/src/include/console/cbmem_console.h index a8519d28a9..e0e35b1cef 100644 --- a/src/include/console/cbmem_console.h +++ b/src/include/console/cbmem_console.h @@ -22,11 +22,8 @@ void cbmemc_init(void); void cbmemc_tx_byte(unsigned char data); #define __CBMEM_CONSOLE_ENABLE__ (IS_ENABLED(CONFIG_CONSOLE_CBMEM) && \ - (ENV_RAMSTAGE || ENV_VERSTAGE || ENV_POSTCAR || \ - (IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) && \ - (ENV_ROMSTAGE || \ - (ENV_BOOTBLOCK && IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE))))\ - )) + (ENV_RAMSTAGE || ENV_VERSTAGE || ENV_POSTCAR || ENV_ROMSTAGE || \ + (ENV_BOOTBLOCK && IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)))) #if __CBMEM_CONSOLE_ENABLE__ static inline void __cbmemc_init(void) { cbmemc_init(); } diff --git a/src/include/timestamp.h b/src/include/timestamp.h index 7b2b480cf2..2074b71408 100644 --- a/src/include/timestamp.h +++ b/src/include/timestamp.h @@ -19,8 +19,7 @@ #include <commonlib/timestamp_serialized.h> -#if IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS) && (IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) \ - || !defined(__PRE_RAM__)) +#if IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS) /* * timestamp_init() needs to be called once for each of these cases: * 1. __PRE_RAM__ (bootblock, romstage, verstage, etc) and @@ -59,8 +58,6 @@ uint32_t get_us_since_boot(void); /** * Workaround for guard combination above. - * Looks like CONFIG_EARLY_CBMEM_INIT selects - * timestamp.c to be build. */ #if IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS) /* Implemented by the architecture code */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index e988e89cd6..2fd4e4ca0c 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -43,9 +43,7 @@ bootblock-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c bootblock-y += libgcc.c bootblock-$(CONFIG_GENERIC_UDELAY) += timer.c -ifeq ($(CONFIG_EARLY_CBMEM_INIT),y) bootblock-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c -endif bootblock-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c bootblock-y += delay.c @@ -97,10 +95,8 @@ ramstage-y += romstage_stack.c romstage-y += stack.c ramstage-y += rtc.c -ifeq ($(CONFIG_EARLY_CBMEM_INIT),y) romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c -endif romstage-y += compute_ip_checksum.c ifeq ($(CONFIG_COMPILER_GCC),y) diff --git a/src/lib/cbmem_common.c b/src/lib/cbmem_common.c index e3bec17bd6..ba4660920d 100644 --- a/src/lib/cbmem_common.c +++ b/src/lib/cbmem_common.c @@ -17,9 +17,6 @@ #include <bootstate.h> #include <rules.h> #include <symbols.h> -#if IS_ENABLED(CONFIG_ARCH_X86) && !IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) -#include <arch/acpi.h> -#endif void cbmem_run_init_hooks(int is_recovery) { @@ -40,16 +37,3 @@ void cbmem_run_init_hooks(int is_recovery) void __weak cbmem_fail_resume(void) { } - -#if ENV_RAMSTAGE && !IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) -static void init_cbmem_post_device(void *unused) -{ - if (acpi_is_wakeup()) - cbmem_initialize(); - else - cbmem_initialize_empty(); -} - -BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY, - init_cbmem_post_device, NULL); -#endif diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 709752bb23..2f60fb5a7f 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -63,17 +63,13 @@ static struct cbmem_console *cbmem_console_p CAR_GLOBAL; #else /* - * When running from RAM, a lot of console output is generated before CBMEM is + * When running from RAM, some console output is generated before CBMEM is * reinitialized. This static buffer is used to store that output temporarily, * to be concatenated with the CBMEM console buffer contents accumulated * during the ROM stage, once CBMEM becomes available at RAM stage. */ -#if IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) #define STATIC_CONSOLE_SIZE 1024 -#else -#define STATIC_CONSOLE_SIZE CONFIG_CONSOLE_CBMEM_BUFFER_SIZE -#endif static u8 static_console[STATIC_CONSOLE_SIZE]; #endif diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index e6cf67f064..e4d5aec990 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -458,12 +458,10 @@ void main(void) post_code(POST_CONSOLE_READY); /* - * CBMEM needs to be recovered in the EARLY_CBMEM_INIT case because - * timestamps, APCI, etc rely on the cbmem infrastructure being - * around. Explicitly recover it. + * CBMEM needs to be recovered because timestamps, APCI, etc rely on + * the cbmem infrastructure being around. Explicitly recover it. */ - if (IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) - cbmem_initialize(); + cbmem_initialize(); /* Record current time, try to locate timestamps in CBMEM. */ timestamp_init(timestamp_get()); diff --git a/src/lib/imd_cbmem.c b/src/lib/imd_cbmem.c index a7a513f05c..d6eed28860 100644 --- a/src/lib/imd_cbmem.c +++ b/src/lib/imd_cbmem.c @@ -64,7 +64,7 @@ static inline const struct imd_entry *cbmem_to_imd(const struct cbmem_entry *e) } /* These are the different situations to handle: - * CONFIG_EARLY_CBMEM_INIT: + * * In ramstage cbmem_initialize() attempts a recovery of the * cbmem region set up by romstage. It uses cbmem_top() as the * starting point of recovery. @@ -116,11 +116,8 @@ void __weak cbmem_top_init(void) static void cbmem_top_init_once(void) { /* Call one-time hook on expected cbmem init during boot. This sequence - assumes first init call is in romstage for early cbmem init and - ramstage for late cbmem init. */ - if (IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) && !ENV_ROMSTAGE) - return; - if (IS_ENABLED(CONFIG_LATE_CBMEM_INIT) && !ENV_RAMSTAGE) + assumes first init call is in romstage. */ + if (!ENV_ROMSTAGE) return; cbmem_top_init(); diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index a9c9addbc6..b7634177ff 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -136,8 +136,7 @@ void run_ramstage(void) * firmware path on resume. */ if (IS_ENABLED(CONFIG_ARCH_X86) && - !IS_ENABLED(CONFIG_NO_STAGE_CACHE) && - IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) + !IS_ENABLED(CONFIG_NO_STAGE_CACHE)) run_ramstage_from_resume(&ramstage); if (prog_locate(&ramstage)) diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index 105b6961ff..36d02516a3 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -218,10 +218,10 @@ void timestamp_init(uint64_t base) return; } - /* In the EARLY_CBMEM_INIT case timestamps could have already been - * recovered. In those circumstances honor the cache which sits in BSS + /* Timestamps could have already been recovered. + * In those circumstances honor the cache which sits in BSS * as it has already been initialized. */ - if (ENV_RAMSTAGE && IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) && + if (ENV_RAMSTAGE && ts_cache->cache_state != TIMESTAMP_CACHE_UNINITIALIZED) return; @@ -271,10 +271,10 @@ static void timestamp_sync_cache_to_cbmem(int is_recovery) /* * There's no need to worry about the base_time fields being out of - * sync because only the following configurations are used/supported: + * sync because only the following configuration is used/supported: * - * 1. Timestamps get initialized before ramstage, which implies - * CONFIG_EARLY_CBMEM_INIT and CBMEM initialization in romstage. + * Timestamps get initialized before ramstage, which implies + * CBMEM initialization in romstage. * This requires the board to define a TIMESTAMP() region in its * memlayout.ld (default on x86). The base_time from timestamp_init() * (usually called from bootblock.c on most non-x86 boards) persists @@ -283,18 +283,12 @@ static void timestamp_sync_cache_to_cbmem(int is_recovery) * sync, which will adjust the timestamps in there to the correct * base_time (from CBMEM) with the timestamp_add_table_entry() below. * - * 2. Timestamps only get initialized in ramstage *and* - * CONFIG_LATE_CBMEM_INIT is set. main() will call timestamp_init() - * very early (before any timestamps get logged) to set a base_time - * in the BSS cache, which will later get synced over to CBMEM. - * * If you try to initialize timestamps before ramstage but don't define * a TIMESTAMP region, all operations will fail (safely), and coreboot * will behave as if timestamps only get initialized in ramstage. * - * If CONFIG_EARLY_CBMEM_INIT is set but timestamps only get - * initialized in ramstage, the base_time from timestamp_init() will - * get ignored and all timestamps will be 0-based. + * If timestamps only get initialized in ramstage, the base_time from + * timestamp_init() will get ignored and all timestamps will be 0-based. */ for (i = 0; i < ts_cache_table->num_entries; i++) { struct timestamp_entry *tse = &ts_cache_table->entries[i]; |