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-rw-r--r--src/drivers/spi/Kconfig2
-rw-r--r--src/drivers/spi/gigadevice.c4
-rw-r--r--src/drivers/spi/macronix.c2
-rw-r--r--src/drivers/spi/spi_flash.c10
-rw-r--r--src/drivers/spi/winbond.c2
-rw-r--r--src/include/spi.h1
-rw-r--r--src/southbridge/intel/bd82x6x/Kconfig1
-rw-r--r--src/southbridge/intel/bd82x6x/spi.c6
8 files changed, 21 insertions, 7 deletions
diff --git a/src/drivers/spi/Kconfig b/src/drivers/spi/Kconfig
index 334ee9589f..8e6191e8c5 100644
--- a/src/drivers/spi/Kconfig
+++ b/src/drivers/spi/Kconfig
@@ -80,7 +80,7 @@ config SPI_FLASH_WINBOND
data in the SPI flash and your SPI flash is made by Winbond.
config SPI_FLASH_NO_FAST_READ
- bool
+ bool "Disable Fast Read command"
default n
depends on SPI_FLASH
help
diff --git a/src/drivers/spi/gigadevice.c b/src/drivers/spi/gigadevice.c
index 8454705b69..0647baf674 100644
--- a/src/drivers/spi/gigadevice.c
+++ b/src/drivers/spi/gigadevice.c
@@ -154,7 +154,7 @@ static int gigadevice_write(struct spi_flash *flash, u32 offset,
cmd[3] = offset & 0xff;
#if CONFIG_DEBUG_SPI_FLASH
printk(BIOS_SPEW,
- "PP gigadevice.c: %#p => cmd = { %#02x %#02x%02x%02x }"
+ "PP gigadevice.c: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
" chunk_len = %zu\n", buf + actual,
cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
#endif
@@ -226,7 +226,7 @@ struct spi_flash *spi_flash_probe_gigadevice(struct spi_slave *spi, u8 *idcode)
stm->flash.write = gigadevice_write;
stm->flash.erase = gigadevice_erase;
-#ifdef CONFIG_SPI_FLASH_NO_FAST_READ
+#if CONFIG_SPI_FLASH_NO_FAST_READ
stm->flash.read = spi_flash_cmd_read_slow;
#else
stm->flash.read = spi_flash_cmd_read_fast;
diff --git a/src/drivers/spi/macronix.c b/src/drivers/spi/macronix.c
index 148527d953..f9138e1e55 100644
--- a/src/drivers/spi/macronix.c
+++ b/src/drivers/spi/macronix.c
@@ -210,7 +210,7 @@ struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode)
mcx->flash.write = macronix_write;
mcx->flash.erase = macronix_erase;
-#ifdef CONFIG_SPI_FLASH_NO_FAST_READ
+#if CONFIG_SPI_FLASH_NO_FAST_READ
mcx->flash.read = spi_flash_cmd_read_slow;
#else
mcx->flash.read = spi_flash_cmd_read_fast;
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c
index 4757486bf5..7116cbfd99 100644
--- a/src/drivers/spi/spi_flash.c
+++ b/src/drivers/spi/spi_flash.c
@@ -281,7 +281,7 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
/* search the table for matches in shift and id */
for (i = 0; i < ARRAY_SIZE(flashes); ++i)
if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
-#ifdef __SMM__
+#if CONFIG_SMM_TSEG && defined(__SMM__)
/* Need to relocate this function */
tseg_relocate((void **)&flashes[i].probe);
#endif
@@ -296,6 +296,14 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
goto err_manufacturer_probe;
}
+#if CONFIG_SMM_TSEG && defined(__SMM__)
+ /* Ensure flash handlers are valid for TSEG */
+ tseg_relocate((void **)&flash->read);
+ tseg_relocate((void **)&flash->write);
+ tseg_relocate((void **)&flash->erase);
+ tseg_relocate((void **)&flash->name);
+#endif
+
printk(BIOS_INFO, "SF: Detected %s with page size %x, total %x\n",
flash->name, flash->sector_size, flash->size);
diff --git a/src/drivers/spi/winbond.c b/src/drivers/spi/winbond.c
index 0e50843211..50c2ed419d 100644
--- a/src/drivers/spi/winbond.c
+++ b/src/drivers/spi/winbond.c
@@ -205,7 +205,7 @@ struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode)
stm->flash.write = winbond_write;
stm->flash.erase = winbond_erase;
-#ifdef CONFIG_SPI_FLASH_NO_FAST_READ
+#if CONFIG_SPI_FLASH_NO_FAST_READ
stm->flash.read = spi_flash_cmd_read_slow;
#else
stm->flash.read = spi_flash_cmd_read_fast;
diff --git a/src/include/spi.h b/src/include/spi.h
index 7d195d002a..5fbe51e1ab 100644
--- a/src/include/spi.h
+++ b/src/include/spi.h
@@ -46,6 +46,7 @@
/* SPI opcodes */
#define SPI_OPCODE_WREN 0x06
+#define SPI_OPCODE_FAST_READ 0x0b
/*-----------------------------------------------------------------------
* Representation of a SPI slave, i.e. what we're communicating with.
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig
index 75858c2a67..7634b801ff 100644
--- a/src/southbridge/intel/bd82x6x/Kconfig
+++ b/src/southbridge/intel/bd82x6x/Kconfig
@@ -34,7 +34,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
select SPI_FLASH
- select SPI_FLASH_NO_FAST_READ
config EHCI_BAR
hex
diff --git a/src/southbridge/intel/bd82x6x/spi.c b/src/southbridge/intel/bd82x6x/spi.c
index 53b9982192..05649fc85d 100644
--- a/src/southbridge/intel/bd82x6x/spi.c
+++ b/src/southbridge/intel/bd82x6x/spi.c
@@ -484,6 +484,12 @@ static void spi_setup_type(spi_transaction *trans)
if (trans->bytesout == 4) { /* and bytesin is > 0 */
trans->type = SPI_OPCODE_TYPE_READ_WITH_ADDRESS;
}
+
+ /* Fast read command is called with 5 bytes instead of 4 */
+ if (trans->out[0] == SPI_OPCODE_FAST_READ && trans->bytesout == 5) {
+ trans->type = SPI_OPCODE_TYPE_READ_WITH_ADDRESS;
+ --trans->bytesout;
+ }
}
static int spi_setup_opcode(spi_transaction *trans)