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-rw-r--r--src/arch/i386/Makefile.inc4
-rw-r--r--src/cpu/amd/dualcore/dualcore.c3
-rw-r--r--src/cpu/amd/model_fxx/init_cpus.c4
-rw-r--r--src/cpu/amd/quadcore/quadcore.c3
-rw-r--r--src/include/pc80/mc146818rtc.h8
-rw-r--r--src/mainboard/amd/dbm690t/Kconfig6
-rw-r--r--src/mainboard/kontron/986lcd-m/romstage.c1
-rw-r--r--src/northbridge/amd/amdk8/coherent_ht.c3
-rw-r--r--src/northbridge/amd/amdk8/raminit.c3
-rw-r--r--src/northbridge/amd/amdk8/raminit_f.c3
-rw-r--r--src/northbridge/intel/e7520/raminit.c11
-rw-r--r--src/northbridge/intel/e7525/raminit.c9
-rw-r--r--src/pc80/Makefile.inc1
-rw-r--r--src/pc80/mc146818rtc.c3
-rw-r--r--src/pc80/mc146818rtc_early.c3
-rw-r--r--src/pc80/serial.c3
16 files changed, 47 insertions, 21 deletions
diff --git a/src/arch/i386/Makefile.inc b/src/arch/i386/Makefile.inc
index ba6489030f..6e7864ec0c 100644
--- a/src/arch/i386/Makefile.inc
+++ b/src/arch/i386/Makefile.inc
@@ -206,11 +206,11 @@ else
$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
@printf " CC $(subst $(obj)/,,$(@))\n"
- $(CC) -MMD $(CFLAGS) -I$(src) -I. -c $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
+ $(CC) -MMD $(CFLAGS) -I$(src) -I. -I$(obj) -c $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h
@printf " CC romstage.inc\n"
- $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -c -S $< -o $@
+ $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
@printf " POST romstage.inc\n"
diff --git a/src/cpu/amd/dualcore/dualcore.c b/src/cpu/amd/dualcore/dualcore.c
index f13a62cbe7..b1894ce154 100644
--- a/src/cpu/amd/dualcore/dualcore.c
+++ b/src/cpu/amd/dualcore/dualcore.c
@@ -7,6 +7,9 @@
#include "cpu/amd/dualcore/dualcore_id.c"
#include <pc80/mc146818rtc.h>
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
static inline unsigned get_core_num_in_bsp(unsigned nodeid)
{
diff --git a/src/cpu/amd/model_fxx/init_cpus.c b/src/cpu/amd/model_fxx/init_cpus.c
index d6f63933cb..fa0f8b4f3f 100644
--- a/src/cpu/amd/model_fxx/init_cpus.c
+++ b/src/cpu/amd/model_fxx/init_cpus.c
@@ -1,3 +1,7 @@
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
+
//it takes the CONFIG_ENABLE_APIC_EXT_ID and CONFIG_APIC_ID_OFFSET and CONFIG_LIFT_BSP_APIC_ID
#ifndef SET_FIDVID
#if CONFIG_K8_REV_F_SUPPORT == 0
diff --git a/src/cpu/amd/quadcore/quadcore.c b/src/cpu/amd/quadcore/quadcore.c
index e0659892ef..3e5c197157 100644
--- a/src/cpu/amd/quadcore/quadcore.c
+++ b/src/cpu/amd/quadcore/quadcore.c
@@ -20,6 +20,9 @@
#include <console/console.h>
#include <pc80/mc146818rtc.h>
#include <northbridge/amd/amdht/ht_wrapper.c>
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
#ifndef SET_NB_CFG_54
#define SET_NB_CFG_54 1
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h
index 0abb2a6b4b..032e3858bf 100644
--- a/src/include/pc80/mc146818rtc.h
+++ b/src/include/pc80/mc146818rtc.h
@@ -81,14 +81,6 @@
#define PC_CKS_RANGE_END 45
#define PC_CKS_LOC 46
-/* coreboot cmos checksum is usually only built over bytes 49..125
- * LB_CKS_RANGE_START, LB_CKS_RANGE_END and LB_CKS_LOC are defined
- * in option_table.h
- */
-#if CONFIG_HAVE_OPTION_TABLE
-#include <option_table.h>
-#endif
-
#ifndef UTIL_BUILD_OPTION_TABLE
#include <arch/io.h>
static inline unsigned char cmos_read(unsigned char addr)
diff --git a/src/mainboard/amd/dbm690t/Kconfig b/src/mainboard/amd/dbm690t/Kconfig
index 224a0be890..f9d61072f9 100644
--- a/src/mainboard/amd/dbm690t/Kconfig
+++ b/src/mainboard/amd/dbm690t/Kconfig
@@ -25,12 +25,6 @@ config MAINBOARD_DIR
string
default amd/dbm690t
-# This is a temporary fix, and should be removed when the race condition for
-# building option_table.h is fixed.
-config WARNINGS_ARE_ERRORS
- bool
- default n
-
config DCACHE_RAM_BASE
hex
default 0xc8000
diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c
index 902e5c2679..b3acece1f5 100644
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -43,6 +43,7 @@
#include "superio/winbond/w83627thg/w83627thg.h"
#include <pc80/mc146818rtc.h>
+#include "option_table.h"
#include <console/console.h>
#include <cpu/x86/bist.h>
diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c
index ad787caabd..f1f5bbc35c 100644
--- a/src/northbridge/amd/amdk8/coherent_ht.c
+++ b/src/northbridge/amd/amdk8/coherent_ht.c
@@ -69,6 +69,9 @@
#include <stdlib.h>
#include "arch/romcc_io.h"
#include <pc80/mc146818rtc.h>
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
#include "amdk8.h"
diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c
index efb7738306..a48a835185 100644
--- a/src/northbridge/amd/amdk8/raminit.c
+++ b/src/northbridge/amd/amdk8/raminit.c
@@ -10,6 +10,9 @@
#include <reset.h>
#include "raminit.h"
#include "amdk8.h"
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
#if (CONFIG_RAMTOP & (CONFIG_RAMTOP -1)) != 0
# error "CONFIG_RAMTOP must be a power of 2"
diff --git a/src/northbridge/amd/amdk8/raminit_f.c b/src/northbridge/amd/amdk8/raminit_f.c
index ff3eb3914d..916f04d67b 100644
--- a/src/northbridge/amd/amdk8/raminit_f.c
+++ b/src/northbridge/amd/amdk8/raminit_f.c
@@ -28,6 +28,9 @@
#include "raminit.h"
#include "amdk8_f.h"
#include <spd_ddr2.h>
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
#ifndef QRANK_DIMM_SUPPORT
#define QRANK_DIMM_SUPPORT 0
diff --git a/src/northbridge/intel/e7520/raminit.c b/src/northbridge/intel/e7520/raminit.c
index 7f1b9d500a..0ef73cc026 100644
--- a/src/northbridge/intel/e7520/raminit.c
+++ b/src/northbridge/intel/e7520/raminit.c
@@ -23,6 +23,9 @@
#include <stdlib.h>
#include "raminit.h"
#include "e7520.h"
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
#define BAR 0x40000000
@@ -619,11 +622,13 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
}
ecc = 2;
- if (read_option(CMOS_VSTART_ECC_memory,CMOS_VLEN_ECC_memory,1) == 0) {
+#if CONFIG_HAVE_OPTION_TABLE
+ if (read_option(CMOS_VSTART_ECC_memory, CMOS_VLEN_ECC_memory, 1) == 0) {
ecc = 0; /* ECC off in CMOS so disable it */
print_debug("ECC off\n");
- }
- else {
+ } else
+#endif
+ {
print_debug("ECC on\n");
}
drc &= ~(3 << 20); /* clear the ecc bits */
diff --git a/src/northbridge/intel/e7525/raminit.c b/src/northbridge/intel/e7525/raminit.c
index be44434bf5..a33b0c7680 100644
--- a/src/northbridge/intel/e7525/raminit.c
+++ b/src/northbridge/intel/e7525/raminit.c
@@ -23,6 +23,9 @@
#include <stdlib.h>
#include "raminit.h"
#include "e7525.h"
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
#define BAR 0x40000000
@@ -619,11 +622,13 @@ static int spd_set_dram_controller_mode(const struct mem_controller *ctrl,
}
ecc = 2;
+#if CONFIG_HAVE_OPTION_TABLE
if (read_option(CMOS_VSTART_ECC_memory,CMOS_VLEN_ECC_memory,1) == 0) {
ecc = 0; /* ECC off in CMOS so disable it */
print_debug("ECC off\n");
- }
- else {
+ } else
+#endif
+ {
print_debug("ECC on\n");
}
drc &= ~(3 << 20); /* clear the ecc bits */
diff --git a/src/pc80/Makefile.inc b/src/pc80/Makefile.inc
index b7890f56b6..fe7e8e8750 100644
--- a/src/pc80/Makefile.inc
+++ b/src/pc80/Makefile.inc
@@ -8,3 +8,4 @@ initobj-$(CONFIG_CACHE_AS_RAM) += serial.o
subdirs-y += vga
$(obj)/pc80/mc146818rtc.o : $(OPTION_TABLE_H)
+$(obj)/pc80/mc146818rtc_early.initobj.o : $(OPTION_TABLE_H)
diff --git a/src/pc80/mc146818rtc.c b/src/pc80/mc146818rtc.c
index 23b834c06a..ce9132596b 100644
--- a/src/pc80/mc146818rtc.c
+++ b/src/pc80/mc146818rtc.c
@@ -2,6 +2,9 @@
#include <pc80/mc146818rtc.h>
#include <boot/coreboot_tables.h>
#include <string.h>
+#if CONFIG_USE_OPTION_TABLE
+#include "option_table.h"
+#endif
/* control registers - Moto names
*/
diff --git a/src/pc80/mc146818rtc_early.c b/src/pc80/mc146818rtc_early.c
index ed1f0926f0..d09d6b9df0 100644
--- a/src/pc80/mc146818rtc_early.c
+++ b/src/pc80/mc146818rtc_early.c
@@ -1,5 +1,8 @@
#include <pc80/mc146818rtc.h>
#include <fallback.h>
+#if CONFIG_USE_OPTION_TABLE
+#include "option_table.h"
+#endif
#ifndef CONFIG_MAX_REBOOT_CNT
#error "CONFIG_MAX_REBOOT_CNT not defined"
diff --git a/src/pc80/serial.c b/src/pc80/serial.c
index 4a4ca68d2e..5e2538e34b 100644
--- a/src/pc80/serial.c
+++ b/src/pc80/serial.c
@@ -1,6 +1,9 @@
#include <lib.h> /* Prototypes */
#include <arch/io.h>
#include "pc80/mc146818rtc.h"
+#if CONFIG_USE_OPTION_TABLE
+#include "option_table.h"
+#endif
/* Base Address */
#ifndef CONFIG_TTYS0_BASE
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 02:29:35 +0000