diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/common/block/smi/smi_util.c | 9 | ||||
| -rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/picasso/smi.c | 20 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/smi.c | 20 |
5 files changed, 9 insertions, 42 deletions
diff --git a/src/soc/amd/common/block/smi/smi_util.c b/src/soc/amd/common/block/smi/smi_util.c index dcf0c84b0a..1e4561d7a5 100644 --- a/src/soc/amd/common/block/smi/smi_util.c +++ b/src/soc/amd/common/block/smi/smi_util.c @@ -56,6 +56,15 @@ void configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level) smi_write32(SMI_REG_SMITRIG0, reg32); } +/** Set the EOS bit and enable SMI generation from southbridge */ +void global_smi_enable(void) +{ + uint32_t reg = smi_read32(SMI_REG_SMITRIG0); + reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */ + reg |= SMITRG0_EOS; /* Set EOS bit */ + smi_write32(SMI_REG_SMITRIG0, reg); +} + void soc_route_sci(uint8_t event) { smi_write8(SMI_SCI_MAP(event), event); diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index b7eed5b5a7..ddab52243b 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -48,7 +48,6 @@ ramstage-y += reset.c ramstage-y += acp.c ramstage-y += sata.c ramstage-y += memmap.c -ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-y += uart.c ramstage-y += finalize.c ramstage-y += soc_util.c diff --git a/src/soc/amd/picasso/smi.c b/src/soc/amd/picasso/smi.c deleted file mode 100644 index fb6d3484ad..0000000000 --- a/src/soc/amd/picasso/smi.c +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -/* - * Utilities for SMM setup - */ - -#include <console/console.h> -#include <cpu/x86/smm.h> -#include <amdblocks/acpimmio.h> -#include <soc/southbridge.h> -#include <soc/smi.h> - -/** Set the EOS bit and enable SMI generation from southbridge */ -void global_smi_enable(void) -{ - uint32_t reg = smi_read32(SMI_REG_SMITRIG0); - reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */ - reg |= SMITRG0_EOS; /* Set EOS bit */ - smi_write32(SMI_REG_SMITRIG0, reg); -} diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 47ecbe7fc5..f711c3a5d9 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -58,7 +58,6 @@ ramstage-y += southbridge.c ramstage-y += northbridge.c ramstage-y += sata.c ramstage-y += memmap.c -ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-y += uart.c ramstage-y += usb.c ramstage-y += tsc_freq.c diff --git a/src/soc/amd/stoneyridge/smi.c b/src/soc/amd/stoneyridge/smi.c deleted file mode 100644 index fb6d3484ad..0000000000 --- a/src/soc/amd/stoneyridge/smi.c +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -/* - * Utilities for SMM setup - */ - -#include <console/console.h> -#include <cpu/x86/smm.h> -#include <amdblocks/acpimmio.h> -#include <soc/southbridge.h> -#include <soc/smi.h> - -/** Set the EOS bit and enable SMI generation from southbridge */ -void global_smi_enable(void) -{ - uint32_t reg = smi_read32(SMI_REG_SMITRIG0); - reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */ - reg |= SMITRG0_EOS; /* Set EOS bit */ - smi_write32(SMI_REG_SMITRIG0, reg); -} |