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-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/meteorlake/FspmUpd.h8
-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/meteorlake/FspsUpd.h2
2 files changed, 4 insertions, 6 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/meteorlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/meteorlake/FspmUpd.h
index c0424c7076..52677b096c 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/meteorlake/FspmUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/meteorlake/FspmUpd.h
@@ -1445,16 +1445,14 @@ typedef struct {
UINT16 IccLimit[6];
/** Offset 0x0766 - Enable/Disable VR FastVmode. The VR will initiate reactive protection if Fast Vmode is enabled.
- Enable/Disable VR FastVmode; [0] for IA, [1] for GT, 0: Disable; <b>1: Enable</b>.
- [2] for SA, <b>0: Disable</b>; 1: Enable.
+ Enable/Disable VR FastVmode; 0: Disable; <b>1: Enable</b>. For all VR by domain
0: Disable, 1: Enable
**/
UINT8 EnableFastVmode[6];
/** Offset 0x076C - Enable CEP
- Enable/Disable CEP (Current Excursion Protection) Support. [0] for IA, [1] for GT,
- 0: Disable; <b>1: Enable</b>. [2] for SA, <b>0: Disable</b>; 1: Enable. [3] through
- [5] are Reserved.
+ Enable/Disable CEP (Current Excursion Protection) Support. 0: Disable; <b>1: Enable</b>.
+ [0] for IA, [1] for GT, [2] for SA, [3] through [5] are Reserved.
$EN_DIS
**/
UINT8 CepEnable[6];
diff --git a/src/vendorcode/intel/fsp/fsp2_0/meteorlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/meteorlake/FspsUpd.h
index e30f626b43..c7cb725820 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/meteorlake/FspsUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/meteorlake/FspsUpd.h
@@ -813,7 +813,7 @@ typedef struct {
**/
UINT8 Reserved17;
-/** Offset 0x04D0 - Pointer of ChipsetInit Binary
+/** Offset 0x04D0 - Pointer to ChipsetInit Binary
ChipsetInit Binary Pointer.
**/
UINT32 ChipsetInitBinPtr;