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-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspmUpd.h14
1 files changed, 12 insertions, 2 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspmUpd.h
index a687eb0ad1..c33aebf6de 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspmUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspmUpd.h
@@ -3201,7 +3201,17 @@ typedef struct {
/** Offset 0x0AA8 - Reserved
**/
- UINT8 Reserved45[144];
+ UINT8 Reserved45[130];
+
+/** Offset 0x0B2A - LP5 Bank Mode
+ LP5 Bank Mode. 0: Auto, 1: 8 Bank Mode, 2: 16 Bank Mode, 3: BG Mode, default is 0
+ 0:Auto, 1:8 Bank Mode, 2:16 Bank Mode, 3:BG Mode
+**/
+ UINT8 Lp5BankMode;
+
+/** Offset 0x0B2B - Reserved
+**/
+ UINT8 Reserved46[13];
} FSP_M_CONFIG;
/** Fsp M UPD Configuration
@@ -3222,7 +3232,7 @@ typedef struct {
/** Offset 0x0B38
**/
- UINT8 UnusedUpdSpace34[6];
+ UINT8 UnusedUpdSpace33[6];
/** Offset 0x0B3E
**/